NISHIMURA Tomonori | Department of Materials Engineering, School of Engineering, The University of Tokyo
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概要
- Nishimura Tomonoriの詳細を見る
- 同名の論文著者
- Department of Materials Engineering, School of Engineering, The University of Tokyoの論文著者
関連著者
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NISHIMURA Tomonori
Department of Materials Engineering, School of Engineering, The University of Tokyo
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Nishimura Tomonori
Department Of Chemistry Faculty Of Science Okayama University
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Kita Koji
Department Of Materials Engineering School Of Engineering The University Of Tokyo
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Toriumi Akira
Department Of Materials Engineering School Of Engineering The University Of Tokyo
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Toriumi Akira
Mirai-advanced Semiconductor Research Center (mirai-asrc) National Institute Of Advanced Industrial
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Toriumi A
Univ. Tokyo Tokyo Jpn
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Toriumi Akira
The Authors Are With Advanced Lsi Technology Laboratory Toshiba Corporation:presently With The Depar
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Toriumi Akira
Advanced Lsi Technology Toshiba Corporation
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Toriumi Akira
Department Of Applied Physics University Of Tokyo
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Toriumi Akira
Advanced Lsi Technology Laboratory Research & Development Center Toshiba Co.
著作論文
- Ge/GeO_2 Interface Control with High-Pressure Oxidation for Improving Electrical Characteristics
- Mobility Variations in Mono- and Multi-Layer Graphene Films
- Low Temperature Phosphorus Activation in Germanium through Nickel Germanidation for Shallow n^+/p Junction
- A Significant Shift of Schottky Barrier Heights at Strongly Pinned Metal/Germanium Interface by Inserting an Ultra-Thin Insulating Film
- Evidence of Electron Trapping Center at Pentacene/SiO_2 Interface
- Advanced Characterization of High-k Gate Stack by Internal Photo Emission (IPE) : Interfacial Dipole and Band Diagram in Al/Hf(Si)O_2/Si MOS Structure
- Effect of Ultra-thin Al_2O_3 Insertion on Fermi-level Pinning at Metal/Ge Interface
- Thermally Robust Germanium MIS Gate Stacks with LaYO_3 Dielectric Film
- Direct Evidence of GeO Volatilization from GeO_2 Films and Impact of Its Suppression on GeO_2/Ge MIS Characteristics
- Reduction of Bias-Induced Threshold Voltage Shift in Pentacene Field Effect Transistors by Interface Modification and Molecular Ordering