Shirakawa Isao | Department Of Information System Engineering Graduate School Of Engineering Osaka University

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概要

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著作論文

A 25kV ESD Proof LDMOSFET with a Turn-on Discharge MOSFET
A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS
A 200V CMOS SOI IC with Field-Plate Trench Isolation for EL Displays
A Single Chip Automotive Control LSI Using SOI BiCDMOS
A Wireless Data System Constructed of SAW-Devices and Its Applications to Medical Cares
A Fast Minimum Cost Flow Algorithm for Regenerating Optimal Layout of Functional Cells
Object Sharing Scheme for Heterogeneous Environment
Wireless Digital Video Transmission System Using IEEE802.11b PHY with Error Correction Block Based ARQ Protocol(Special Issue on Mobile Multimedia Communications)
Single Chip Implementation of MPEG2 Decoder for HDTV Level Pictures (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems)
High-Level Synthesis of a Multithreaded Processor for Image Generation
Performance Estimation at Architecture Level for Embedded Systems(Special Section on VLSI Design and CAD Algorithms)
Low-Power VLSI Implementation by NMOS 4-Phase Dynamic Logic (特集電子システムの設計技術と設計自動化)
Low-Power Scheme of NMOS 4-Phase Dynamic Logic (Special Issue on Integrated Electronics and New System Paradigms)
Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays(Parasitics and Noise)(VLSI Design and CAD Algorithms)
Implementation of Java Accelerator for High-Performance Embedded Systems
An Algorithm for Generating All The Directed Paths and Its Application

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