SHIRAKAWA Isao | Faculty of Engineering, Osaka University
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概要
関連著者
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SHIRAKAWA Isao
Faculty of Engineering, Osaka University
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Shirakawa Isao
Faculty Of Engineering Osaka University
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ONOYE Takao
Faculty of Engineering, Osaka University
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Onoye Takao
Faculty Of Engineering Osaka University
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Shirakawa I
Graduate School Of Applied Informatics University Of Hyogo
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Shirakawa Isao
Department Of Information System Engineering Graduate School Of Engineering Osaka University
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Shirakawa Isao
Osaka University
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MASAKI Toshihiro
Faculty of Engineering, Osaka University
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Masaki Toshihiro
Department Of Information Networking Graduate School Of Information Science And Technology Osaka Uni
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FUJITA Gen
Faculty of Engineering, Osaka University
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TAKATSU Masamichi
Faculty of Engineering, Osaka University
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YAMAI Nariyoshi
Computation Center, Osaka University
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Sakamoto Akio
Faculty Of Engineering Tokushima University
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YAMADA Akihisa
Faculty of Pharmaceutical Sciences, Kobe-Gakuin University
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Kimura K
Audio Video Information Technology Laboratory Matsushita Electric Industrial Co. Ltd.
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Ishiura N
Osaka Univ. Suita‐shi Jpn
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Ishiura Nagisa
Faculty Of Engineering Osaka University
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Shirakawa Isao
Graduate School Of Applied Informatics University Of Hyogo
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Yamada Akihisa
The Design Technology Development Laboratory Integrated Circuits Development Group Sharp Corporation
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Yamada Akihisa
Faculty Of Pharmaceutical Sciences Kobe-gakuin University
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Hirata Hiroaki
Audio Video Information Technology Laboratory Matsushita Electric Industrial Co. Ltd.
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Fujita Gen
Osaka University
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Yamai Nariyoshi
Computation Center Osaka University
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Kurimoto Takuji
Central Research Laboratory Sharp Corporation
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Takatsu Masamichi
Faculty Of Engineering Osaka University:doga Corporation
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Matsumura Kenji
K.c.s. Co. Ltd.
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Higashiyama Yoichi
Faculty of Engineering
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Ariyoshi Hiromu
Faculty of Engineering
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Ohba Shogo
NEC Telecom Systems, Ltd.
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MORIMOTO Yasuo
Faculty of Engineering, Osaka University
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SATO Yoh
Faculty of Engineering, Osaka University
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Kimura Kozo
Audio Video Information Technology Laboratory, Matsushita Electric Industrial Co., Ltd.
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Asahara Shigeo
Audio Video Information Technology Laboratory, Matsushita Electric Industrial Co., Ltd.
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Sagishima Takayuki
Audio Video Information Technology Laboratory, Matsushita Electric Industrial Co., Ltd.
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CHIBA Toru
Faculty of Engineering, Osaka University
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OZAKI Hiroshi
Faculty of Engineering, Osaka University
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SUGITA Sadatsugu
Toyo Information System
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NISHIOKA Ikuo
Central Research Laboratory, Sharp Corporation
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Nishioka Ikuo
Central Research Laboratory Sharp Corporation
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Sato Yoh
Faculty Of Engineering Osaka University
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Chiba Toru
Faculty Of Engineering Osaka University
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Asahara Shigeo
Audio Video Information Technology Laboratory Matsushita Electric Industrial Co. Ltd.
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Akino T
Department Of Electronic System And Information Engineering School Of Biology-oriented Science And T
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Akino Toshiro
Semiconductor Research Center Matsushita Electric Industrial Co. Ltd.
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Ohba Shogo
Nec Telecom Systems Ltd.
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Yang Shih-tsung
Faculty Of Engineering Osaka University
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Yamazaki Toshiki
Faculty of Engineering, Osaka University
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Kambe Takashi
Precision Technology Development Center, SHARP Corporation
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Kambe T
Sharp Corp. Tenri‐shi Jpn
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Kimura Kozo
Audio Video Information Technology Laboratory Matsushita Electric Industrial Co. Ltd.
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Toyonaga Masahiko
Faculty of Engineering, Osaka University
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Yamazaki Toshiki
Faculty Of Engineering Osaka University
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Higashiyama Y
Ehime Univ. Matsuyama‐shi Jpn
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Sagishima Takayuki
Audio Video Information Technology Laboratory Matsushita Electric Industrial Co. Ltd.
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Toyonaga M
Faculty Of Science Kochi University
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Morimoto Yasuo
Faculty Of Engineering Osaka University
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Yamada Akihiko
The Department Of Electrical Engineering Graduate School Of Engineering Tokyo Metroporitan Universit
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Yamada Akihiko
Department Of Electrical Engineering Graduate School Of Engineering Tokyo Metropolitan University
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Ozaki Hiroshi
Faculty Of Engineering Osaka University
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SAKAMOTO AKIO
Faculty of Engineering, Tokushima University
著作論文
- Single Chip Implementation of Motion Estimator Dedicated to MPEG2 MP@HL (Special Section on Digital Signal Processing)
- A Factored Reliability Formula for Directed Source-to-All-Terminal Networks (Special Section on Reliability)
- Single Chip Implementation of MPEG2 Decoder for HDTV Level Pictures (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems)
- High-Level Synthesis of a Multithreaded Processor for Image Generation
- OSACA; A System for Automated Routing on Two-layer Printed Wiring Board
- Datapath Scheduling for Behavioral Description with Conditional Branches (Special Section on VLSI Design and CAD Algorithms)
- A New Approach of Fractal-Analysis Based Module Clustering for VLSI Placement (Special Section on VLSI Design and CAD Algorithms)