Ishiura N | Osaka Univ. Suita‐shi Jpn
スポンサーリンク
概要
関連著者
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Ishiura N
Osaka Univ. Suita‐shi Jpn
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Kambe T
Sharp Corp. Tenri‐shi Jpn
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Yamada Akihisa
The Design Technology Development Laboratory Integrated Circuits Development Group Sharp Corporation
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Yamada Akihiko
The Department Of Electrical Engineering Graduate School Of Engineering Tokyo Metroporitan Universit
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Yamada Akihiko
Department Of Electrical Engineering Graduate School Of Engineering Tokyo Metropolitan University
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Ishiura Nagisa
The Graduate School Of Engineering Osaka University
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KAMBE Takashi
the Design Technology Development Laboratory, IC Group, Sharp Corporation
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Yamaguchi M
Kure National Coll. Of Technol. Kure‐shi Jpn
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Yamaguchi Masayuki
Optoelectronics And High Frequency Device Research Laboratories Nec Corporation
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SHIRAKAWA Isao
Faculty of Engineering, Osaka University
著作論文
- Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes (Special Section on VLSI Design and CAD Algorithms)
- A Binding Algorithm for Retargetable Compilation to Non-orthogonal DSP Architectures (Special Section on VLSI Design and CAD Algorithms)
- Architecture Evaluation Based on the Datapath Structure and Parallel Constraint (Special Section on VLSI Design and CAD Algorithms)
- Datapath Scheduling for Behavioral Description with Conditional Branches (Special Section on VLSI Design and CAD Algorithms)