Shirakawa I | Univ. Hyogo Kobe‐shi Jpn

スポンサーリンク

概要

• 同名の論文著者
• Univ. Hyogo Kobe‐shi Jpnの論文著者

関連著者

• Shirakawa I

  Univ. Hyogo Kobe‐shi Jpn

• Shirakawa I

  Graduate School Of Applied Informatics University Of Hyogo

• Shirakawa Isao

  Graduate School Of Applied Informatics University Of Hyogo

• Onoye Takao

  Graduate School Of Engineering Osaka University

• Mitsuyama Yukio

  Department Of Information Systems Engineering Osaka University

• Kimura Motoki

  Department Of Information Systems Engineering Graduate School Of Information Science And Technology

• Onoye Takao

  Department Of Communications And Computer Engineering Kyoto University

• Miki Morgan

  System Technology Development Center Corporate R&d Group Sharp Corporation

• MITSUYAMA Yukio

  Graduate School of Information Science and Technology, Osaka University

• 尾上 孝雄

  大阪大学大学院情報科学研究科情報システム工学専攻

• Onoye T

  Kyoto Univ. Kyoto‐shi Jpn

• Shirakawa Isao

  Department Of Information System Engineering Graduate School Of Engineering Osaka University

• HASHIMOTO Masanori

  Graduate School of Information Science and Technology, Osaka University

• Zaldy Andales

  Graduate School Of Engineering Osaka University:institute Of Mathematical Sciences And Physics Unive

• Onoye Takao

  Osaka Univ. Suita‐shi Jpn

• TAKAHASHI Kazuma

  Graduate School of Information Science and Technology, Osaka University

• IMAI Rintaro

  Graduate School of Information Science and Technology, Osaka University

• KIMURA Motoki

  Graduate School of Information Science and Technology, Osaka University

• KIMURA Motoki

  Department of Information Systems Engineering, Graduate School of Information Science and Technology

• Imai Rintaro

  Graduate School Of Information Science And Technology Osaka University

• Takahashi Kazuma

  Graduate School Of Information Science And Technology Osaka University

• Shirakawa Isao

  Department Of Electronic Engineering University Of Osaka

• Andales Zaldy

  Graduate School of Engineering, Osaka University

もっと見る 閉じる

著作論文

• Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems(Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa)
• Area-Efficient Reconfigurable Architecture for Media Processing
• Implementation of Java Accelerator for High-Performance Embedded Systems(Simulation Acceletor)(VLSI Design and CAD Algorithms)
• Implementation of Java Accelerator for High-Performance Embedded Systems
• A Novel Dynamically Reconfigurable Hardware-based Cipher (特集 システムLSIの設計技術と設計自動化)

スポンサーリンク