Analysis of sidewall damage layer in low-k film using the interline dielectric capacitance measurements (Special issue: Advanced metallization for ULSI applications)
スポンサーリンク
概要
- 論文の詳細を見る
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
著者
-
OKADA Masakazu
Renesas Technology Corporation
-
Asai Koyu
Renesas Electronics Corporation, 751 Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
-
Fujisawa Masahiko
Renesas Electronics Corporation, Hitachinaka, Ibaraki 312-8504, Japan
-
Hirose Yukinori
Renesas Electronics Corporation, 751 Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
-
Kido Shigenori
Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan
-
Nakanishi Nobuto
Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan
-
Furuhashi Takahisa
Renesas Electronics Corporation, Hitachinaka, Ibaraki 312-8504, Japan
-
Matsumoto Masahiro
Renesas Electronics Corporation, Hitachinaka, Ibaraki 312-8504, Japan
-
Kawano Yuichi
Renesas Electronics Corporation, Hitachinaka, Ibaraki 312-8504, Japan
関連論文
- A Large-Scale, Flip-Flop RAM Imitating a Logic LSI for Fast Development of Process Technology
- Advanced Air Gap Process for Multi-Level-Cell Flash Memories Reducing Threshold Voltage Interference and Realizing High Reliability
- Analytical Approach for Enhancement of n-Channel Metal--Oxide--Semiconductor Field-Effect Transistor Performance with Carbon-Doped Source/Drain Formed by Molecular Carbon Ion Implantation and Laser Annealing
- Cu Dual-Damascene Interconnects with Direct Chemical Mechanical Polishing Process on Porous Low-$k$ Film
- Characterizations of NiSi2-Whisker Defects in n-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with $\langle 110\rangle$ Channel on Si(100)
- Analysis of sidewall damage layer in low-k film using the interline dielectric capacitance measurements (Special issue: Advanced metallization for ULSI applications)
- Narrow Line Effect of Nickel Silicide on p+ Active Lines and Its Suppression by Fluorine Ion Implantation
- Three-Dimensional Visualization Technique for Crystal Defects in High Performance p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with Embedded SiGe Source/Drain
- Anomalous Nickel Silicide Encroachment in n-Channel Metal–Oxide–Semiconductor Field-Effect Transitors on Si(110) Substrates and Its Suppression by Si+ Ion-Implantation Technique
- Suppression of Stress-Induced Voiding by Controlling Microstructure of Cu Electroplated Films
- Stress Analysis for Chip–Package Interaction of Cu/Low-$k$ Multilayer Interconnects
- Suppression of Stress-Induced Voiding by Controlling Microstructure of Cu Electroplated Films