Three-Dimensional Visualization Technique for Crystal Defects in High Performance p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with Embedded SiGe Source/Drain

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概要

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• We have performed a detailed analysis of crystal defects in high-performance p-channel metal–oxide–semiconductor field-effect transistors (pMOSFETs) with embedded SiGe source/drain (S/D), using low-angle annular dark field (ADF) scanning transmission electron microscopy (STEM) and electron tomography. We achieved successful results in three-dimensional visualization of crystal defects for the first time. Consequently, we have discussed about the three-dimensional physical geometric relationship between crystal defects and device architecture. This approach is sure to contribute to the development of advanced complementary metal–oxide–semiconductor (CMOS) devices using strained silicon technology.

• 2010-04-25

著者

• Kudo Shuichi

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Junko Komori

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Hirose Yukinori

  Renesas Electronics Corporation, 751 Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan

• Nakanishi Nobuto

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Kazuhiko Sato

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Tomohiro Yamashita

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Hidekazu Oda

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Keiichiro Kashihara

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Naofumi Murata

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Toshiharu Katayama

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Kyoichiro Asayama

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Eiichi Murakami

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Toshiharu Katayama

  Renesas Semiconductor Engineering Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Yukinori Hirose

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Nobuto Nakanishi

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Kudo Shuichi

  Renesas Electronics Corporation, 751 Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan

関連論文

• Evaluation of the Strain around an Isolated Shallow Trench and the Impact of Stress on LSI Device Performance
• Analysis of Hot Carrier Degradation of Lateral Double-Diffused Metal–Oxide–Semiconductor under Gate Pulse Stress
• Characterizations of NiSi2-Whisker Defects in n-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with $\langle 110\rangle$ Channel on Si(100)
• Analysis of sidewall damage layer in low-k film using the interline dielectric capacitance measurements (Special issue: Advanced metallization for ULSI applications)
• Three-Dimensional Visualization Technique for Crystal Defects in High Performance p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with Embedded SiGe Source/Drain
• Anomalous Nickel Silicide Encroachment in n-Channel Metal–Oxide–Semiconductor Field-Effect Transitors on Si(110) Substrates and Its Suppression by Si+ Ion-Implantation Technique
• Suppression of Stress-Induced Voiding by Controlling Microstructure of Cu Electroplated Films
• Suppression of Stress-Induced Voiding by Controlling Microstructure of Cu Electroplated Films

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