Three Series-Connected Transistor Model for a Recess-Channel-Array Transistor and Improvement of Electrical Characteristics by a Bottom Fin Structure
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概要
- 論文の詳細を見る
A three series-connected transistor model is introduced to understand the electrical characteristics of conventional recess-channel-array transistors (RCATs) and modified RCATs. An RCAT is considered to be a serial connection of three transistors consisting of one bottom transistor and two vertical transistors. The electrical characteristics of a cell transistor are explained by a balance of those transistors. A newly modified fin-RCAT which has a fin structure at the bottom of a silicon recess is proposed to improve cell transistor characteristics. This design improves cell current by 70% while maintaining retention characteristics.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2009-05-25
著者
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Yang Wouns
Advanced Technology Development Team
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Kim Chang-kyu
Advanced Technology Development Team
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YOSHIDA Makoto
Advanced Technology Development Team
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KAHNG Jae-Rok
Advanced Technology Development Team
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MOON Joon-Seok
Advanced Technology Development Team
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JUNG Kyoung-Ho
Advanced Technology Development Team
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KIM Keunnam
Advanced Technology Development Team
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SUNG Hyunju
Advanced Technology Development Team
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Lee Chul
Advanced Chemical Technology Division Krict
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Jin Gyoyoung
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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Moon Joon-Seok
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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Kim Chang-Kyu
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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Oh Kyung-Seok
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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Kim Keunnam
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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Lee Chul
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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Yang Wouns
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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Jung Kyoung-Ho
Advanced Technology Development Team 1, Memory R&D Center, Samsung Electronics Co., Hwasung, Kyunggi 445-701, Korea
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- Three Series-Connected Transistor Model for a Recess-Channel-Array Transistor and Improvement of Electrical Characteristics by a Bottom Fin Structure