A Hardware Implementation of a Content-Based Motion Estimation Algorithm for Real-Time MPEG-4 Video Coding(<Special Section>Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
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概要
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Power efficiency and real-time processing capability are two major issues in today's mobile video applications. We proposed a novel Motion Estimation (ME) engine for power-efficient real-time MPEG-4 video coding based on our previously proposed content-based ME algorithm. By adopting Full Search (FS) and Three Step Search (TSS) alternatively according to the nature of video contents, this algorithm keeps the visual quality very close to that of FS with only 3% of its computational power. We designed a flexible Block Matching (BM) Unit with 16-PE SIMD data path so that the adaptive ME can be performed at a much lower clock frequency and hardware cost as compared with previous FS based work. To reduce the energy cost caused by excessive external memory access, on-chip SRAM is also utilized and optimized for parallel processing in the BM Unit. The ME engine is fabricated with TSMC 0.18μm technology. When processing QCIF (15fps) video, the estimated power is 2.88mW @ 4.16MHz (supply voltage: 1.62V). It is believed to be a favorable contribution to the video encoder LSI design for mobile applications.
- 社団法人電子情報通信学会の論文
- 2006-04-01
著者
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GOTO Satoshi
IPS, Waseda University
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IKENAGA Takeshi
IPS, Waseda University
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Ikenaga Takeshi
Graduate School Of Ips Waseda University
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Ikenaga Takeshi
Ips Waseda University
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Goto Satoshi
Ips Waseda University
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LI Shen
IPS, Waseda University
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MATSUI Masataka
Digital Media SoC Dept., SoC R & D Center, Toshiba Corp.
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TAKEDA Hideki
Digital Media SoC Dept., SoC R & D Center
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Li Shen
Waseda Univ. Kitakyushu‐shi Jpn
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Matsui Masataka
Digital Media Soc Dept. Soc R & D Center Toshiba Corp.
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Takeda Hideki
Digital Media Soc Dept. Soc R & D Center
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