Two-Dimensional Cyclic Bias Device Simulator and Its Application to GaAs HJFET Pulse Pattern Effect Analysis (Special Issue on TCAD for Semiconductor Industries)

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概要

• 論文の詳細を見る

• A device simulator that simulates device performance in the cyclic bias steady state was developed, and it was applied to GaAs hetero-junction FET (HJFET) pulse pattern effect. Although there is a large time-constant difference between the pulse signals and deep trap reactions, the simulator searches the cyclic bias steady states at about 30 iterations. A non-linear shift in the drain current level with the mark ratio was confirmed, which has been estimated from the rate equation of electron capture and cmission based on Shockley-Read-Hall statistics for deep traps.

• 社団法人電子情報通信学会の論文
• 1999-06-25

著者

• Takahashi Yoshihiro

  Department Of Applied Physics School Of Engineering Tohoku University

• Kinoshita K

  Ntt Basic Research Laboratory

• Ohno Y

  Jst‐presto Saitama Jpn

• Takahashi Y

  Tanaka Solid Junction Project Erato Japan Science And Research Corporation

• Takahashi Yoichi

  Department Of Nuclear Engineering Faculty Of Engineering University Of Tokyo

• Kunihiro Kazuaki

  Optoelectronics And High Frequency Device Research Laboratories Nec Corporation

• Takahashi Yukihiro

  Central Research Laboratory Matsushita Electric Industrial Co. Ltd.

• TAKAHASHI Yuji

  Optoelectronics and High Frequency Device Research Laboratories, NEC Corporation

• OHNO Yasuo

  Optoelectronics and High Frequency Device Research Laboratories, NEC Corporation

• Takahashi Yoshinori

  Division Of Electrical Electronic And Information Engineering Osaka University

• Kobayashi Keiji

  Toshiba Research And Development Center

• Takahashi Y

  National Inst. Animal Health Ibaraki Jpn

• Kasahara K

  Nec Corp. Otsu‐shi Jpn

• Takahashi Y

  Department Of Molecular & Materials Sciences Kyushu University

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