Proposal of a Multi-Threaded Processor Architecture for Embedded Systems and Its Evaluation(Special Section of Selected Papers from the 13th Workshop on Circuits and Systems in Karuizawa)
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概要
- 論文の詳細を見る
In this paper, an architecture of multi-threaded processor for embedded systems is proposed and evaluated comparing with other processors for embedded systems. The experimental results show the trade-off of hardware costs and execution times among processors. Taking proposed multi-threaded processor into account as an embedded processor, design space of embedded systems are enlarged and more suitable architecture can be selected under some design constraints.
- 社団法人電子情報通信学会の論文
- 2001-03-01
著者
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TAKEUCHI Yoshinori
Department of Media Science, Graduate School of Information Science, Nagoya University
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IMAI Masaharu
Department of Information and Computer Sciences, Toyohashi University of Technology
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Imai M
Graduate School Of Information Science Technology Osaka University
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Imai Masaharu
Department Of Information And Computer Sciences Toyohashi University Of Technology
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Takeuchi Yoshinori
Graduate School Of Information Science Technology Osaka University
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Takeuchi Yoshinori
Advanced Technology Research Laboratories Matsushita Electric Industrial Co. Ltd.
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Kobayashi Shinsuke
Graduate School Of Engineering And Science Osaka University
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Kobayashi Shinsuke
Department Of Computer Science Faculty Of Engineering Gunma University
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Kitajima Akira
Department Of Informatics And Mathematical Science Graduate School Of Engineering Science Osaka Univ
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Takeuchi Yoshinori
Department Of Informatics And Mathematical Science Graduate School Of Engineering Science Osaka Univ
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Imai Masaharu
Department Of Informatics And Mathematical Science Graduate School Of Engineering Science Osaka Univ
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