A Method to Convert Concurrent EFSMs with Multi-Rendezvous into Synchronous Sequential Circuit(Special Section on Concurrent Systems Technology)
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概要
- 論文の詳細を見る
In this paper, we propose a technique to synthesize a hardware circuit from a protocol specification consisting of several concurrent EFSMs with multi-rendezvous specified among their subsets. In our class, each multi-rendezvous can be specified among more than two EFSMs, and several multi-rendezvous can be specified for different combinations of EFSMs. In the proposed technique, using the information such as current states of EFSMs, input values at external gates and guard expressions, we compose a circuit to evaluate whether each multi-rendezvous can be executed. If several exclusive multi-rendezvous get executable simultaneously for some combinations of EFSMs, we select one of them according to the priority order given in advance. We compose such a circuit as a combinational logic circuit so that it works fast. By applying our technique to Abracadabra protocol specified in LOTOS, it is confirmed that the derived circuit handles multi-rendezvous efficiently.
- 社団法人電子情報通信学会の論文
- 1998-04-25
著者
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Yasumoto Keiichi
Faculty Of Economics Shiga University
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Higashino Teruo
Department Of Informatics And Mathematical Science Osaka University
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Higashino Teruo
The Department Of Informatics And Mathematical Science Graduate School Of Engineering Science Osaka
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HIGASHINO Teruo
The authors are with the Department of Informatics and Mathematical Science, Osaka University
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Kitajima Akira
Department Of Informatics And Mathematical Science Graduate School Of Engineering Science Osaka Univ
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KITAJIMA Akira
The authors are with the Department of Information and Computer Sciences, Osaka University
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YASUMOTO Keiichi
The author is with the Faculty of Economics, Shiga University
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TANIGUCHI Kenichi
The authors are with the Department of Information and Computer Sciences, Osaka University
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Taniguchi Kenichi
Department Of Informatics And Mathematical Science Osaka University
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