A Design Methodology for a DPA-Resistant Circuit with RSL Techniques
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概要
- 論文の詳細を見る
A design methodology of Random Switching Logic (RSL) using CMOS standard cell libraries is proposed to counter power analysis attacks against cryptographic hardware modules. The original RSL proposed in 2004 requires a unique RSL-gate for random data masking and glitch suppression to prevent secret information leakage through power traces. In contrast, our new methodology enables to use general logic gates supported by standard cell libraries. In order to evaluate its practical performance in hardware size and speed as well as resistance against power analysis attacks, an AES circuit with the RSL technique was implemented as a cryptographic LSI using 130-nm and 90-nm CMOS standard cell library. From the results of attack experiments that used a million traces, we confirmed that the RSL-AES circuit has very high DPA and CPA resistance thanks to the contributions of both the masking function and the glitch suppressing function.
- 2010-12-01
著者
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SUZUKI Daisuke
Information Technology R&D Center, Mitsubishi Electric Corporation
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Matsumoto Tsutomu
Graduate School Of Engineering Yokohama National University:graduate School Of Environment And Infor
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SAEKI Minoru
Information Technology R & D Center, Mitsubishi Electric Corporation
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Saeki Minoru
Information Technology R&d Center Mitsubishi Electric Corporation
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Matsumoto Tsutomu
Graduate School Of Environmental And Information Sciences Yokohama National University
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Shimizu Koichi
Information Technology R&d Center Mitsubishi Electric Corporation
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SATOH Akashi
Research Center for Information Security, National Institute of Advanced Industrial Science and Tech
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Suzuki Daisuke
Information Technology R&d Center Mitsubishi Electric Corporation
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Satoh Akashi
Research Center For Information Security National Institute Of Advanced Industrial Science And Techn
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Suzuki Daisuke
Information Technology R & D Center Mitsubishi Electric Corporation
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Suzuki Daisuke
Information Technol. R&d Center Mitsubishi Electric Corp.
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Shimizu Koichi
Information Technol. R&d Center Mitsubishi Electric Corp.
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