Suzuki Daisuke | Information Technology R&d Center Mitsubishi Electric Corporation
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概要
関連著者
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Suzuki Daisuke
Information Technology R&d Center Mitsubishi Electric Corporation
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Suzuki Daisuke
Information Technology R & D Center Mitsubishi Electric Corporation
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Suzuki Daisuke
Information Technol. R&d Center Mitsubishi Electric Corp.
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SAEKI Minoru
Information Technology R & D Center, Mitsubishi Electric Corporation
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Saeki Minoru
Information Technology R&d Center Mitsubishi Electric Corporation
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SUZUKI Daisuke
Information Technology R&D Center, Mitsubishi Electric Corporation
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Matsumoto Tsutomu
Graduate School Of Engineering Yokohama National University:graduate School Of Environment And Infor
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Matsumoto Tsutomu
Graduate School Of Environmental And Information Sciences Yokohama National University
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Ichikawa Tetsuya
Kamakura Office Mitsubishi Electric Engineering Company Limited
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Shimizu Koichi
Information Technology R&d Center Mitsubishi Electric Corporation
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Shimizu Koichi
Information Technol. R&d Center Mitsubishi Electric Corp.
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SATOH Akashi
Research Center for Information Security, National Institute of Advanced Industrial Science and Tech
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Satoh Akashi
Research Center For Information Security National Institute Of Advanced Industrial Science And Techn
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SAEKI Minoru
Information Technology R&D Center, Mitsubishi Electric Corporation
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MATSUMOTO Tsutomu
Graduate School of Environmental and Information Sciences, Yokohama National University
著作論文
- How to Maximize the Potential of FPGA-Based DSPs for Modular Exponentiation
- A Design Methodology for a DPA-Resistant Circuit with RSL Techniques
- How to Decide Selection Functions for Power Analysis : From the Viewpoint of Hardware Architecture of Block Ciphers
- Leakage Analysis of DPA Countermeasures at the Logic Level(Side Channel Attacks,Cryptography and Information Security)
- Random Switching Logic : A New Countermeasure against DPA and Second-Order DPA at the Logic Level(Side Channel Attacks,Cryptography and Information Security)
- Security Evaluations of MRSL and DRSL Considering Signal Delays
- An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style