Deadzone-Minimized Systematic Offset-Free Phase Detectors
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概要
- 論文の詳細を見る
Two phase detectors (PD) are proposed to minimize the phase offset and deadzone when used in DLL or PLL. With the shortest symmetrical racing paths from both inputs, the binary PD achieves fast latch operation and theoretical elimination of the setup time. In contrast to the conventional PDs whose offsets are around 10ps with large sensitivity to sizing, the proposed binary PD shows an offset of less than 1ps with a reduction of 30-percent delay time. The proposed latch-type binary phase detection is also expanded to form a linear PD by the addition of a reset-generating circuit.
- （社）電子情報通信学会の論文
- 2008-09-01
著者
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SIM Jae-Yoon
Pohang University of Science and Technology (POSTECH)
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PARK Hong
Pohang University of Science and Technology (POSTECH)
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Park Hong-june
Pohang University Of Science And Technology (postech)
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Sim Jae‐yoon
Pohang University Of Science And Technology (postech)
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Park Hong‐june
Pohang University Of Science And Technology (postech)
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KIM Young-Sang
Pohang University of Science and Technology (POSTECH)
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SUH Yunjae
Pohang University of Science and Technology (POSTECH)
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