An All-Digital CMOS Duty Cycle Correction Circuit with a Duty-Cycle Correction Range of 15-to-85% for Multi-Phase Applications(Electronic Circuits)
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概要
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An all-digital CMOS duty cycle correction (DCC) circuit with a fixed rising edge was proposed to achieve the wide correction ranges of input duty cycle and PVT variations, the low standby power and the fast recovery from the standby mode for use in multi-phase clock systems. SPICE simulations showed that this DCC adjusts the output duty cycle to 50±0.7% for the wide range of input duty cycle from 15% to 85% at the input frequency of 1GHz, within the commercial range of PVT corners. The all-digital implementation and the use of a toggle flip flop at the input stage enabled the wide correction ranges of PVT variations and input duty cycle, respectively.
- 2005-04-01
著者
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PARK Hong
Pohang University of Science and Technology (POSTECH)
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Park Hong‐june
Pohang University Of Science And Technology (postech)
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NAM Jang
High speed CMOS IC Lab., Department of Electrical Engineering, Pohang University of Science and Tech
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PARK Hong
High speed CMOS IC Lab., Department of Electrical Engineering, Pohang University of Science and Tech
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Nam Jang
High Speed Cmos Ic Lab. Department Of Electrical Engineering Pohang University Of Science And Techno
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