Statistical Corner Conditions of Interconnect Delay (Corner LPE Specifications)
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概要
- 論文の詳細を見る
Timing closure in LSI design is becoming more and more difficult. But the conventional interconnect RC extraction method has over-margins caused by its corner conditions settings. In this paper, statistical corner conditions using the independence of variations between process parameters and between interconnect layers are proposed, with examinations using the measurement data. As a result of the method, the fast-to-slow guardband decreases by half in average, compared to the conventional method. The proposed method is ready for implementation to LPE tools.
- 2008-04-01
著者
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Oda Noriaki
Nec Electronics Corp. Kawasaki‐shi Jpn
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YAMADA Kenta
NEC Electronics Corporation
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Yamada Kenta
Nec Electronics Corp. Kawasaki‐shi Jpn
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Oda Noriaki
Nec Electronics Corporation
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