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Ulsi Device Development Division Nec Corporation | 論文
- Circuit Simulation Models for Coming MOSFET Generations(Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
- Dual Damascene Interconnect Technology for 130-nm-node Complementary Metal-Oxide-Semiconductor Devices Using Ladder-Oxide Film
- MOSFET Harmonic Distortion up to the Cutoff Frequency : Measurement and Theoretical Analysis
- Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45nm CMOS Generation(Device,Low-Power, High-Speed LSIs and Related Technologies)
- Silicon Surface Imperfection Probed with a Novel X-Ray Diffraction Technique and Its Influence on the Reliability of Thermally Grown Silicon Oxide
- Lateral Diffusion Distance Measurement of 40-80 nm Junctions by Etching/TEM-Electron Energy Loss Spectroscopy Method
- 0.15 μm Electron Beam Direct Writing for Gbit Dynamic Random Access Memory Fabrication
- A New High-Density Plasma Etching System Using A Dipole-Ring Magnet
- Gate Oxide Breakdown Phenomena in Magnetron Plasma
- Key mechanisms for improved EM lifetime of CoWP capped Cu interconnects
- A 100 nm Node CMOS Technology for System-on-a-Chip Applications(Special Issue on Advanced Sub-0.1 μm CMOS Devices)
- Two-Dimensional Dopant Profiling of nMOSFETs with Shallow-Extensions Using Electrochemical Etching Technique
- Advanced Process/Device Modeling and Its Ompact on the CMOS Design Solution (Special lssue on SISPAD'99)
- Low Temperature Recovery of Ru/(Ba, Sr)TiO_3/Ru Capacitors Degraded by Forming Gas Annealing
- 0.15 µm Electron Beam Direct Writing for Gbit Dynamic Random Access Memory Fabrication
- Ruthenium Film Etching and Cleaning Process Using Cerium Ammonium Nitrate (CAN)-Nitric Acid