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ULSI Development Center, Mitsubishi Electric Corp. | 論文
- Impact of Organic Contaminants from the Environment of Electrical Characteristics of Thin Gate Oxides
- A 0.18 ★m 32 Mb Embedded DRAM Macro for 3-D Graphics Controller
- A Board Level Parallel Test Circuit and a Short Circuit Failure Repair Circuit for High-Density, Low-Power DRAMs (Special Issue on Circuit Technologies for Memory and Analog LSIs)
- Impact of Thermal Nitridation on Microscopic Stress-Induced Leakage Current in Sub-10-nm Silicon Dioxides
- High-Quality CVD/Thermal Stacked Gate Oxide Films with Hydrogen-Free CVD SiO_2 Formed in a SiCl_4-N_2O System
- A Line-Mode Test with Data Register for ULSI Memory Architecture (Special Issue on LSI Memories)
- A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories (Special Issue on LSI Memories)
- Fully Self-Timing Data-Bus Architecture for 64-Mb DRAMs
- An Automatic Temperature Compensation of Internal Sense Ground for Subquarter Micron DRAM's(Special Issue on the 1994 VLSI Circuits Symposium)
- An Efficient Back-Bias Generator with Hybrid Pumping Circuit for 1.5-V DRAM's (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
- Large Scale Embedded DRAM Technology(Special Issue on Multimedia, Network, and DRAM LSIs)