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System Lsi Development Center Mitsubishi Electric Corporation | 論文
- An Embedded Software Scheme for a Real-Time Single-Chip MPEG-2 Encoder System with a VLIW Media Processor Core (Special Issue on Low-Power High-Performance VLSI Processors and Technologies)
- Fast optical power stabilization using a germanium photodiode and a silicon variable optical attenuator integrated on a silicon photonic platform (レーザ・量子エレクトロニクス)
- Fast optical power stabilization using a germanium photodiode and a silicon variable optical attenuator integrated on a silicon photonic platform (光エレクトロニクス)
- Fast optical power stabilization using a germanium photodiode and a silicon variable optical attenuator integrated on a silicon photonic platform (フォトニックネットワーク)
- A Design of High-Speed 4-2 Compressor for Fast Multiplier (Special Issue on Ultra-High-Speed LSIs)
- VLSI-Oriented Motion Estimation Using a Steepest Descent Method in Mobile Video Coding(Low-Power System LSI, IP and Related Technologies)
- A Feed-Forward Dynamic Voltage Control Algorithm for Low Power MPEG4 on Multi-Regulated Voltage CPU(Low-Power System LSI, IP and Related Technologies)
- An Ultra Low Power Motion Estimation Processor for MPEG2 HDTV Resolution Video
- Effect of Post-Growth Annealing on Morphology of Ge Mesa Selectively Grown on Si
- Code Efficiency Evaluation for Embedded Processors(Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
- Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock
- LSI On-Chip Optical Interconnection with Si Nano-Photonics
- A Floating-Point Divider Using Redundant Binary Circuits and an Asynchronous Clock Scheme
- A 286 MHz 64-b Floating Point Multiplier with Enhanced CG Operation
- A 2.6-ns 64-b Fast and Small CMOS Adder (Special Issue on Ultra-High-Speed LSIs)
- A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition
- VLSI Architecture Study of a Real-Time Scalable Optical Flow Processor for Video Segmentation (System LSIs and Microprocessors, VLSI Design Technology in the Sub-100nm Era)
- A Dependable SRAM with 7T/14T Memory Cells
- A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing
- Area Comparison between 6T and 8T SRAM Cells in Dual-V_ Scheme and DVS Scheme(Memory Design and Test,VLSI Design and CAD Algorithms)