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Process Development Team Memory Division Samsung Electronics Co. Ltd. | 論文
- Ge Implantation to Improve Crystallinity and Productivity for Solid Phase Epitaxy Prepared by Atomic Mass Unit Cross Contamination-Free Technique
- Challenge to 0.13μm Device Patterning using KrF
- Challenge to 0.13μm Device Patterning using KrF
- Challenge to 0.13μm Device Patterning using KrF
- Plasma-Assisted Dry Etching of Ferroelectric Capacitor Modules and Application to a 32M Ferroelectric Random Access Memory Devices with Submicron Feature Sizes
- Integration of Ferroelectric Random Access Memory Devices with Ir/IrO_2/Pb(Zr_xTi_)O^^_3/Ir Capacitors Formed by Metalorganic Chemical Vapor Deposition-Grown Pb(Zr_xTi_)O_3
- Enhanced Retention Characteristics of Pb(Zr, Ti)O_3 Capacitors by Ozone Treatment : Electrical Properties of Condensed Matter
- Performance and Reliability of MIM (Metal-Insulator-Metal) Capacitors with ZrO_2 for 50nm DRAM Application
- Improvement of Contact Resistance between Ru Electrode and TiN Barrier in Ru/Crystalline-Ta_2O_5/Ru Capacitor for 50nm Dynamic Random Access Memory
- Investigation of CVD-Co Silicidation for the Improvement of Contact Resistance
- SiGe Source and Drain for Performance Boosting of Peripheral PMOS Transistor in High Density 4 Gb DRAM Technologies(Session 7A Silicon Devices IV,AWAD2006)
- SiGe Source and Drain for Performance Boosting of Peripheral PMOS Transistor in High Density 4 Gb DRAM Technologies(Session 7A Silicon Devices IV,AWAD2006)
- SiGe Source and Drain for Performance Boosting of Peripheral PMOS Transistor in High Density 4Gb DRAM Technologies
- 3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
- 3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
- Low Temperature Chemical Vapor Deposition of (Ba, Sr)TiO_3 Thin Films for High Density Dynamic Random Access Memory Capacitors
- Back-end Integration of Pt/BST/Pt Capacitor for ULSI DRAM Applications
- Back-end Integration of Pt/BST/Pt Capacitor for ULSI DRAM Applications
- Deposition Characteristics of (Ba, Sr)TiO_3 Thin Films by Liquid Source Metal-Organic Chemical Vapor Deposition at Low Substrate Temperatures
- Variation of Electrical Conduction Phenomena of Pt/(Ba, Sr)TiO_3/Pt Capacitors by Different Top Electrode Formation Processes