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Chungnam National Univ. Taejon Kor | 論文
- Trade-Off between Hot Carrier Effect and Current Driving Capability Due to Drain Contact Structures in Deep Submicron MOSFETs
- New Observation of NBTI Degradation and Recovery Effect of Plasma Nitrided Oxide in Nano Scale PMOSFET's
- Temperature effects on silicon-oxide-nitride-oxide-silicon transistors under channel hot electron injection operation (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
- Temperature effects on silicon-oxide-nitride-oxide-silicon transistors under channel hot electron injection operation (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
- Low Temperature Formation of Highly Thermal Immune Ni Germanosilicide Using NiPt Alloy with Co Over-layer in Si_Ge_x according to Different Ge Fractions (x)
- Characterization of the Co-Silicide Penetration Depth into the Junction Area for 0.15 and Sub-0.15 Micron CMOS Technology
- 2本の過剰前肢を右肩甲部に持つ雄韓国子牛の多肢症
- Analysis of Transfer Gate in CMOS Image Sensor(Session 6A : TFTs and Sensors)
- Ramping Amplitude Multi-Frequency Charge Pumping Technique for Silicon-Oxide-Nirtride-Oxide-Silicon Flash EEPROM Cell Transistors
- Characterization of Corner Induced Leakage Current in Shallow Silicided n^+/p Junction
- ブタにおけるタイロシン-フロルフェニコール併用剤の二つの異なる用量での単回筋肉内投与後のタイロシンあるいはフロルフェニコールの比較薬物動態(薬理学)
- Characterization of the Co-Silicide Penetration Depth into the Junction Area
- Bottom Electrode Structures of Pt/RuO_2/Ru on Polycrystalline Silicon for Low Temperature (Ba, Sr)TiO_3 Thin Film Deposition
- Bottom Electrode Structures of Pt/Ru Deposited on Polycrystalline Silicon for Semiconductor Memory Capacitors
- Bottom Electrode Structures of Pt/Ru Deposited on Polycrystalline Silicon for Semiconductor Memory Capacitors
- Bottom Electrode Structures of Pt/Ru Deposited on Polycrystalline Silicon for Semiconductor Memory Capacitors
- Ferroelectric Properties of SrBi_2Ta_2O_9 Thin Films Deposited on Various Bottom Electrodes by a Modified Radio-Frequency Magnetron Sputtering Technique
- Highly Thermal Immune Ni GermanoSilicide with Nitrogen-Doped Ni and Co/TiN Double Capping Layer for Nano-Scale CMOS Applications
- Thermally Robust Nickel Silicide Process for Nano-Scale CMOS Technology(Si Devices and Processes, Fundamental and Application of Advanced Semiconductor Devices)
- Novel Nitrogen doped Ni SALICIDE Process for Nano-Scale CMOS Technology