The Design of a 2.7V, 200MS/s, and 14-Bit CMOS D/A Converter with 63dB of SFDR Characteristics for the 90 MHz Output Signal
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概要
- 論文の詳細を見る
- 2003-06-01
著者
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SUGIMOTO Yasuhiro
Department of Physics, Kyoto University
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SAKURAI Hiroki
Graduate School of E., E., and C. Eng., Chuo University
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Sakurai Hiroki
Graduate School Of E. E. And C. Eng. Chuo University
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Sakurai Hiroki
Graduate School Of Electrical Electronic And Communication Engineering Chuo University
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Sugimoto Yasuhiro
Department Of Electrical And Electronic Engineering Chuo University
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