SAKURAI Hiroki | Graduate School of E., E., and C. Eng., Chuo University
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概要
関連著者
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SAKURAI Hiroki
Graduate School of E., E., and C. Eng., Chuo University
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Sakurai Hiroki
Graduate School Of E. E. And C. Eng. Chuo University
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SUGIMOTO Yasuhiro
Dept. of E., E., and C. Eng., Chuo University
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Sugimoto Yasuhiro
Dept. Of E. E. And C. Eng. Chuo University
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SUGIMOTO Yasuhiro
Department of Physics, Kyoto University
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Tanaka Shigeto
Graduate School Of E. E. And C. Eng. Chuo University
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Sakurai Hiroki
Graduate School Of Electrical Electronic And Communication Engineering Chuo University
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Sugimoto Yasuhiro
Department Of Electrical And Electronic Engineering Chuo University
著作論文
- A Digitally Assisted Gain and Offset Error Cancellation Technique for a CMOS Pipelined ADC with a 1.5-bit Bit-Block Architecture(Analog Signal Processing)
- The Design of a 2.7V, 200MS/s, and 14-Bit CMOS D/A Converter with 63dB of SFDR Characteristics for the 90 MHz Output Signal
- The Realization of an Area-Efficient CMOS Bandgap Reference Circuit with Less than 1.25V of Output Voltage Using a Fractional V_ Amplification Scheme(Electronic Circuits)