Source Engineering for Tunnel Field-Effect Transistor: Elevated Source with Vertical Silicon--Germanium/Germanium Heterostructure
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概要
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In this work, we demonstrate by simulation and experiment that the performance of a p+ Si0.5Ge0.5 source tunnel field-effect transistor (TFET) can be improved by inserting an undoped Ge layer between source and channel. The Ge layer suppresses diffusion of boron into the Si channel and it also forms a Si0.5Ge0.5/Ge/Si hole quantum well, leading to an abrupt boron profile and a high hole concentration at the source edge. At the Ge/Si heterojunction, the presence of compressive strain in the Ge layer increases the valence band offset, while the tensile strain in the Si channel increases the conduction band offset, which effectively reduces the tunnel barrier and enhances the tunnel probability. Compared with a control device without the Ge layer, TFETs with a Si0.5Ge0.5/Ge source show a higher on-state current $I_{\text{ON}}$ and improved threshold voltage $V_{\text{TH}}$ and subthreshold characteristics.
- 2011-04-25
著者
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Yeo Yee-chia
Department Of Electrical And Computer Engineering National University Of Singapore
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Zhan Chunlei
Department Of Electrical And Computer Engineering National University Of Singapore
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Yee Ye
Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576
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Han Genquan
Department of Electrical and Computer Engineering, National University of Singapore, 117576, Singapore
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Yang Yue
Department of Electrical and Computer Engineering, National University of Singapore, 117576, Singapore
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Guo Pengfei
Department of Electrical and Computer Engineering, National University of Singapore, 117576, Singapore
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Guo Pengfei
Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576
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Fan Lu
Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576
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Han Genquan
Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576
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