Comprehensive Modeling of Threshold Voltage Variability Induced by Plasma Damage in Advanced Metal–Oxide–Semiconductor Field-Effect Transistors
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概要
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Threshold voltage shift ($\Delta V_{\text{th}}$) and its variation induced by plasma processing were investigated in detail. Two damage mechanisms occurring in an inductively coupled plasma reactor were focused on in this study; the charging damage induced by the conduction current from plasma and the physical damage attributed to the bombardment of high-energy ions. Regarding the charging damage, $\Delta V_{\text{th}}$ was found to show a power-law dependence on antenna ratio for both SiO2 and high-$k$ gate dielectrics in metal–oxide–semiconductor field-effect transistors (MOSFETs). The observed dependence was also confirmed from the results of a constant-current stress test, indicating that the plasma plays the role of the current source in terms of the charging damage. As for the physical damage, the recess structure in source/drain extension regions was focused on as a possible cause of $\Delta V_{\text{th}}$. The depth of the recess ($d_{\text{R}}$) formed by the physical damage was studied using Si wafers exposed to various plasma conditions and subsequently analyzed for surface damage. The recess depth determined from the experiments and classical molecular dynamics simulations exhibits a power-law dependence on potential drop across the sheath between the plasma and the device surface ($V_{\text{p}}-V_{\text{dc}}$), which is used as a practical measure of the damage. On the basis of the above results, $\Delta V_{\text{th}}$ due to the physical damage was calculated by technology computer-aided design (TCAD) device simulation for n- and p-channel MOSFETs with the recess structure. $\Delta V_{\text{th}}$ shows a linear dependence on recess depth for both n- and p-channel MOSFETs, resulting in the power-law dependence on ($V_{\text{p}}-V_{\text{dc}}$) via $d_{\text{R}}$. These findings provide a simple relationship among the variations of $\Delta V_{\text{th}}$, antenna ratio, and plasma parameters. By taking into account the findings that the MOSFET with high-$k$ dielectrics shows a larger $\Delta V_{\text{th}}$ due to the charging than that with SiO2, and that the MOSFETs with a smaller gate length indicate a larger $\Delta V_{\text{th}}$ due to the Si recess structure, we can conclude that larger amount of plasma damage induces the larger $\Delta V_{\text{th}}$ variations, i.e., the $V_{\text{th}}$ variability induced by the plasma damage is difficult to suppress and will become crucial to the fabrication of future advanced devices. The proposed relationship is useful as a guideline to suppress the $\Delta V_{\text{th}}$ variations caused by plasma damage.
- 2010-04-25
著者
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ERIGUCHI Koji
Graduate School of Engineering, Kyoto University
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Masayuki Kamei
Graduate School of Engineering, Kyoto University, Yoshida-Honmachi, Sakyo-ku, Kyoto 606-8501, Japan
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Matsuda Asahiko
Graduate School of Engineering Kyoto University, Yoshida-Honmachi, Sakyo-ku, Kyoto 606-8501, Japan
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Yoshinori Takao
Graduate School of Engineering, Kyoto University, Yoshida-Honmachi, Sakyo-ku, Kyoto 606-8501, Japan
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Nakakubo Yoshinori
Graduate School of Engineering Kyoto University, Yoshida-Honmachi, Sakyo-ku, Kyoto 606-8501, Japan
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Kouichi Ono
Graduate School of Engineering, Kyoto University, Yoshida-Honmachi, Sakyo-ku, Kyoto 606-8501, Japan
関連論文
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