Phonon-Limited Electron Mobility Behavior and Inherent Mobility Reduction Mechanism of Ultrathin Silicon-on-Insulator Layer with (111) Surface and Ultrathin Germanium-on-Insulator Layer with (001) Surface

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概要

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• One-dimensional self-consistent calculations and relaxation time approximations are used to study the phonon-limited electron mobility behavior of the inversion layer at room temperature for ultrathin body Si(111) and Ge(001) layers in single-gate (SG) and double-gate (DG) silicon-on-insulator (SOI) and germanium-on-insulator (GOI) metal–oxide–semiconductor (MOS) field-effect transistors (FETs). Assuming a 5-nm-thick SOI layer, it is shown that intravalley phonon scattering (acoustic-phonon scattering) in the DG SOI MOSFET inversion layer is strongly suppressed within a range of medium and high effective field ($E_{\text{eff}}$) values; DG SOI MOSFETs have higher phonon-limited electron mobility than SG SOI MOSFETs. Many simulations strongly indicate that, for medium $E_{\text{eff}}$ values, the suppression of acoustic-phonon scattering in a 5-nm-thick DG SOI MOSFET primarily stems from the reduction of the form factor ($F_{00}$) value. Although similar phenomena are observed in approximately 7-nm-thick GOI layers with a Ge(001) surface, it is shown that there is little merit in using the Ge(001) surface for DG GOI MOSFETs.

• 2007-12-15

著者

• Omura Yasuhisa

  Ordist Dept. Electronics Kansai University

• Sato Shingo

  ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan

• Yamamura Tsuyoshi

  ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan

• Omura Yasuhisa

  ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan

• Omura Yasuhisa

  ORDIST and Graduate School of Engineering Science, Kansai University, Suita, Osaka 564-8680, Japan

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• Cross-Current SOI MOSFET Model and Important Aspects of CMOS Operations
• Phonon-Limited Electron Mobility Behavior and Inherent Mobility Reduction Mechanism of Ultrathin Silicon-on-Insulator Layer with (111) Surface and Ultrathin Germanium-on-Insulator Layer with (001) Surface
• Impact of Local High-$k$ Insulator on Drivability and Standby Power of Gate-All-Around Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistor
• Cross-Current Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistor and Application to Multiple Voltage Reference Circuits

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