Yamamura Tsuyoshi | ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan

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概要

関連著者

Omura Yasuhisa
Ordist Dept. Electronics Kansai University
Sato Shingo
ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan
Yamamura Tsuyoshi
ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan
Omura Yasuhisa
ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan
Omura Yasuhisa
ORDIST and Graduate School of Engineering Science, Kansai University, Suita, Osaka 564-8680, Japan

著作論文

Phonon-Limited Electron Mobility Behavior and Inherent Mobility Reduction Mechanism of Ultrathin Silicon-on-Insulator Layer with (111) Surface and Ultrathin Germanium-on-Insulator Layer with (001) Surface

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