Design Feasibility and Prospect of High-Performance Sub-50-nm-Channel Silicon-on-Insulator Single-Gate SOI MOSFET(ELECTRICAL AND ELECTRONIC ENGINEERING,50th anniversary edition)

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概要

• 論文の詳細を見る

• This paper describes advanced results of our evaluation of the minimum channel length (L_<min>). For the first time, we have added the constraint of subthreshold swing to that of threshold voltage, which has already been proposed. The L_<min> definition that includes the subthreshold swing constraint successfully yields a design guideline for low standby power applications, while the L_<min> definition based on the threshold voltage constraint does the same for high-speed applications. In contrast to previous predictions, simulation results indicate that the planar single-gate SOI MOSFET promises better performance, clearing the ITRS roadmap until at least 2007 for low standby power applications.

• 関西大学の論文

著者

• Omura Yasuhisa

  Ordist:graduate School Japan Of Engineering2 Kansai University

• Omura Yasuhisa

  Ordist Dept. Electronics Kansai University

• Yoshimoto Kazuhisa

  Graduate School Japan Of Engineering2 Kansai University

• Omura Yasuhisa

  ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan

• Omura Yasuhisa

  ORDIST and Graduate School of Engineering Science, Kansai University, Suita, Osaka 564-8680, Japan

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• Design Feasibility and Prospect of High-Performance Sub-50-nm-Channel Silicon-on-Insulator Single-Gate SOI MOSFET(ELECTRICAL AND ELECTRONIC ENGINEERING,50th anniversary edition)
• Low-Temperature Behaviors of Phonon-Limited Electron Mobility of Sub-10-nm-Thick Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistor with (001) and (111) Si Surface Channels
• Cross-Current SOI MOSFET Model and Important Aspects of CMOS Operations
• Phonon-Limited Electron Mobility Behavior and Inherent Mobility Reduction Mechanism of Ultrathin Silicon-on-Insulator Layer with (111) Surface and Ultrathin Germanium-on-Insulator Layer with (001) Surface
• Impact of Local High-$k$ Insulator on Drivability and Standby Power of Gate-All-Around Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistor
• Cross-Current Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistor and Application to Multiple Voltage Reference Circuits

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