Complementary Digital Logic Using Resistively Coupled Single-Electron Transistor
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概要
- 論文の詳細を見る
A new complementary digital logic based on resistively coupled single-electron transistors (R-SET) was proposed and its basic characteristics were numerically analyzed using the Monte Carlo method. The proposed logic has a logic threshold independent of background polarization charges which induce crucial problems in logic operation in the case of a capacitively coupled logic. In addition, the proposed complementary R-SET logic has larger output voltage swing and better logic level stability than those of a conventional resistance-load R-SET logic. The stability of the logic level of the complementary R-SET logic was investigated by calculating the data retention time of flip-flop circuits, and its dependence on temperature and shot noise was examined. For stable operation of the flip-flop circuit, estimated optimal operation temperature and switching delay time are e2/80C tk B and 1500 R tC t, respectively, where C t and R t are capacitance and resistance of the tunnel junction.
- INSTITUTE OF PURE AND APPLIED PHYSICSの論文
- 1996-02-28
著者
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Ishibashi Hiroshi
Faculty Of Engineering Yokohama National University
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Jinguu Yasuyuki
Faculty Of Engineering Yokohama National University
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Sugahara Masanori
Faculty Of Engineering Yokohama National University
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Yoshikawa Nobuyuki
Faculty Of Agriculture Iwate University
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Sugahara Masanori
Faculty of Engineering, Yokohama National University, Tokiwadai 156, Hodogaya, Yokohama 240, Japan
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Jinguu Yasuyuki
Faculty of Engineering, Yokohama National University, Tokiwadai 156, Hodogaya, Yokohama 240, Japan
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