Universal test sets for reversible circuits (コンカレント工学)
スポンサーリンク
概要
- 論文の詳細を見る
A set of test vectors is complete for a reversible circuit if it covers all stuck-at faults on the wires of the circuit. It has been known that any reversible circuit has a surprisingly small complete test set, while it is NP-hard to generate a minimum complete test set for a reversible circuit. A test set is universal for a family of reversible circuits if it is complete for any circuit in the family. We show minimum universal test sets for some families of CNOT circuits.
- 社団法人電子情報通信学会の論文
- 2009-11-19
著者
-
TAYU Satoshi
Department of Communication and Integrated Systems, Tokyo Institute of Technology
-
UENO Shuichi
Department of Communication and Integrated Systems, Tokyo Institute of Technology
-
Ueno Shuichi
Dept. Of Communications And Integrated Systems Tokyo Institute Of Technology
-
Ueno Shuichi
東工大
-
Tayu Satoshi
Dept. Of Communications And Integrated Systems Tokyo Institute Of Technology
-
FUKUYAMA Shota
Department of Communications and Integrated Systems Tokyo Institute of Technology
-
Ueno Shuichi
Department Of Communication And Integrated Systems Tokyo Institute Of Technology
-
Tayu Satoshi
Department Of Communication And Integrated Systems Tokyo Institute Of Technology
-
Ueno Shuichi
Department Of Biological Science Faculty Of Science Yamaguchi University
関連論文
- On Two Problems of Nano-PLA Design
- A Note on Two Problems of Nano-PLA Design
- A Note on Two Problems of Nano-PLA Design
- A Note on Two Problems of Nano-PLA Design
- A-1-28 A Note on a Problem of Nano-PLA Design
- Gene expression profiling of human myocardium with atrial fibrillation by DNA microarray analysis
- Cardioprotective effects of angiotensin II receptor blockade on the molecular responses induced by mechanical stress in cardiac myocytes
- DNA microarray analysis of the in vivo progression mechanism for heart failure in Dahl salt-sensitive rats
- On the Complexity of Fault Testing for Reversible Circuits
- A-1-26 On the Complexity of Fault Testing for Reversible Circuits
- Analytical Device Model of SOI MOSFETs Including Self-Heating Effect
- On Dynamic Fault Tolerance for WSI Networks
- A-1-8 Bandwidth of Convex Bipartite Graphs
- On Two-Directional Orthogonal Ray Graphs
- A-1-8 Characterizations of Two-Directional Orthogonal Ray Graphs
- Orthogonal ray graphs and nano-PLA design (コンカレント工学)
- Orthogonal ray graphs and nano-PLA design (回路とシステム)
- On orthogonal ray graphs (アルゴリズム)
- On Orthogonal Ray Graphs with Applications to NanoPLA Design : Extended Abstract
- On Orthogonal Ray Graphs with Applications to NanoPLA Design : Extended Abstract
- On Orthogonal Ray Graphs with Applications to NanoPLA Design : Extended Abstract
- On the permutation routing in all-optical caterpillar networks (回路とシステム)
- On the permutation routing in all-optical caterpillar networks (コンカレント工学)
- On the Complexity of Three-Dimensional Orthogonal Face Routing
- On the complexity of three-dimensional orthogonal face routing (回路とシステム)
- A Note on the Complexity of Scheduling for Precedence Constrained Messages in Distributed Systems(Algorithms and Data Structures)
- On the Three-Dimensional Orthogonal Drawing of Series-Parallel Graphs
- A-1-27 On the Three-Dimensional Layout of Butterfly Networks
- On the Orthogonal Drawing of Outerplanar Graphs(Graphs and Networks)
- A-1-31 A Note on Sparse Networks Tolerating Random Faults for Cycles(A-1. 回路とシステム, 基礎・境界)
- On the Orthogonal Drawing of Series-Parallel Graphs
- On the Three-Dimensional Channel Routing
- Genetic polymorphisms of serotonin and dopamine transporters in mental disorders
- Minimal Forbidden Minors for the Family of Graphs with Proper-Path-Width at Most Two
- Universal Graphs for Graphs with Bounded Path-Width
- On the Proper-Path-Decomposition of Trees
- Fault-Tolerant Graphs for Hypercubes and Tori (Special Issue on Architectures, Algorithms and Networks for Massively parallel Computing)
- Midblastula transition (MBT) of the cell cycles in the yolk and pigment granule-free translucent blastomeres obtained from centrifuged Xenopus embryos
- ESTABLISHMENT A METHOD TO ANALYZE CELL CYCLE AND CELL DIFFERENTIATION UPON EARLY XENOPUS DEVELOPMENT USING TRANSPARENT BLASTOMERES(Developmental Biology,Abstracts of papers presented at the 75^ Annual Meeting of the Zoological Society of Japan)
- A Linear Time Algorithm for Constructing Proper-Path-Decomposition of Width Two
- CHANGES IN INTRACELLULAR CA^ CONCENTRATION DURING EARLY EMBRYONIC CELL CYCLES IN XENOPUS(Developmental Biology,Abstracts of papers presented at the 76^ Annual Meeting of the Zoological Society of Japan)
- THE REGULATING MECHANISM OF CENTROSOME SEPARATION AFTER MID-BLASTULA TRANSITION (MBT) IN XENOPUS EMBRYOS(Developmental Biology,Abstracts of papers presented at the 76^ Annual Meeting of the Zoological Society of Japan)
- FUNCTIONAL ANALYSIS OF PTEN AT GASTRULATION OF XENOPUS LAEVIS(Developmental Biology,Abstracts of papers presented at the 76^ Annual Meeting of the Zoological Society of Japan)
- FUNCTIONAL ANALYSIS OF PTEN AT GASTRULATION OF XENOPUS LAEVIS(Developmental Biology,Abstracts of papers presented at the 75^ Annual Meeting of the Zoological Society of Japan)
- On-Line Multicasting in All-Optical Networks
- A-1-25 On Efficient Universal Quantum Circuits
- Universal test sets for reversible circuits (コンカレント工学)
- Universal test sets for reversible circuits (回路とシステム)
- A-1-14 Fault Testing for Linear Reversible Circuits
- On Fault Testing for Reversible Circuits
- On the fault testing for reversible circuits (アルゴリズム)
- Expression of Matrix Metalloproteinases in Patients With Acute Myocardial Infarction
- A Note on the Circuit-switched Fixed Routing in Networks (特集 並列処理)
- Fault-Tolerant Meshes with Efficient Layouts
- A Note on the Implementation of de Bruijn Networks by the Optical Transpose Interconnection System(Graphs and Networks)
- AS-1-2 Lower Bounds for the Height of Three-Dimensional Channel Routing
- On Two Problems of Nano-PLA Design
- On the energy-aware mapping for NoCs (回路とシステム)
- A-1-7 Universal Test Sets for Reversible Circuits
- A-1-30 On the Three-Dimensional Single-Active-Layer Routing with Dual Channels
- A-1-13 Universal Reversible Circuits
- A-1-7 On the Complexity of Three-Dimensional Orthogonal Face Routing
- On the three-dimensional orthogonal drawing of outerplanar graphs (extended abstract) (アルゴリズム)
- On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs : Extended Abstract
- On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs : Extended Abstract
- On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs : Extended Abstract
- On the three-dimensional single-active-layer routing (回路とシステム)
- An Efficient Quantum Addition Circuit : Extended Abstract
- An Efficient Quantum Addition Circuit : Extended Abstract
- An Efficient Quantum Addition Circuit : Extended Abstract
- On the three-dimensional single-active-layer routing (コンカレント工学)
- A-1-32 A Note on Fault Testing for Reversible Circuits
- Special Section on Discrete Mathematics and Its Applications
- Efficient Embeddings of Binary Trees with Bounded Proper Pathwidth into Paths and Grids
- The Complexity of Three-Dimensional Channel Routing
- AS-1-3 Three-Dimensional Channel Routing is in NP
- A-1-30 A Note on the Three-Dimensional Channel Routing(A-1. 回路とシステム, 基礎・境界)
- The Complexity of Three-Dimensional Channel Routing
- A-1-20 On the Quantum Query Complexity of All-Pairs Shortest Paths
- The Complexity of Three-Dimensional Channel Routing
- AS-1-4 On the Three-Dimensional Layout of Hypercubes
- AS-1-1 The Complexity of Fault Testing for Reversible Circuits
- A-7-1 A Note on Universally Ideal Secret-Sharing Schemes
- A-1-14 A Note on the Maximum Balanced Biclique Problem
- MSA: mixed stochastic algorithm for placement with larger solution space (VLSI設計技術)
- On Efficient Universal Quantum Circuits (回路とシステム)
- On Efficient Universal Quantum Circuits (システム数理と応用)
- On the Complexity of Energy-Aware Mapping for NoCs (信号処理)
- On the Complexity of Energy-Aware Mapping for NoCs (回路とシステム)
- On the Complexity of Energy-Aware Mapping for NoCs (通信方式)
- An Improved Simulated Annealing for 3D Packing with Sequence Triple and Quintuple Representations (ディペンダブルコンピューティング)
- An Improved Simulated Annealing for 3D Packing with Sequence Triple and Quintuple Representations
- On Minimum Feedback Vertex Sets in Graphs (システム数理と応用)
- On Minimum Feedback Vertex Sets in Graphs (信号処理)
- On Minimum Feedback Vertex Sets in Graphs (VLSI設計技術)
- On Minimum Feedback Vertex Sets in Graphs (回路とシステム)
- A-1-35 Minimum Feedback Vertex Sets in Permutation Bigraphs
- On Efficient Universal Quantum Circuits (回路とシステム)
- On Efficient Universal Quantum Circuits (システム数理と応用)
- An Improved Simulated Annealing for 3D Packing with Sequence Triple and Quintuple Representations