AS-1-1 The Complexity of Fault Testing for Reversible Circuits

概要

論文の詳細を見る
社団法人電子情報通信学会の論文
2006-09-07

著者

Ueno Shuichi
Dept. Of Communications And Integrated Systems Tokyo Institute Of Technology
Ueno Shuichi
東工大
Tayu Satoshi
Dept. Of Communications And Integrated Systems Tokyo Institute Of Technology
Ueno Shuichi
Department Of Communication And Integrated Systems Tokyo Institute Of Technology
Tayu Satoshi
Department Of Communication And Integrated Systems Tokyo Institute Of Technology
Ito Shigeru
Department Of Communications And Integrated Systems Tokyo Institute Of Technology
Ueno Shuichi
Department Of Biological Science Faculty Of Science Yamaguchi University

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AS-1-1 The Complexity of Fault Testing for Reversible Circuits

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