Design of Analog Current-Mode Loser-Take-All Circuit(<Special Section>Analog Circuit and Device Technologies)
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概要
- 論文の詳細を見る
A CMOS circuit is proposed which takes multiple analog input currents and extracts minimum input current at the output. It is very fast and requires no subtraction from the constant current source. It exhibits O(N) complexity and uses only 4×N MOS transistors where N is the number of system inputs. This circuit consumes very little power and very small area. The substrate bias affects the threshold voltage of transistors and improves performance of the structure.
- 社団法人電子情報通信学会の論文
- 2006-06-01
著者
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Hadidi Khayrollah
Microelectronic Research Laboratory Urmia University
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Hadidi Khayrollah
Urmia Univ. Urmia Irn
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ASLONI Mohsen
Microelectronic research laboratory, Urmia University
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KHOEI Abdollah
Microelectronic research laboratory, Urmia University
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Khoei Abdollah
Urmia Univ. Urmia Irn
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Asloni Mohsen
Microelectronic Research Laboratory Urmia University
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Hadidi Khayrollah
Microelectronic Research Laboratory Of Urmia University
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Khoei Abdollah
Microelectronic Research Laboratory Of Urmia University
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