Modified CMOS Op-Amp with Improved Gain and Bandwidth(<Special Section>Analog Circuit and Device Technologies)
スポンサーリンク
概要
- 論文の詳細を見る
This paper presents a novel gain boosted and bandwidth enhanced CMOS Op-Amp based on the well-known folded cascode structure. In contrast with the conventional methods which increase output resistance for gain boosting, the transconductance of the circuit is increased, therefore the -3dB frequency is the same as for folded cascode structure. With negligible extra power consumption, the unity gain bandwidth is increased considerably. In this method, a new node is created in the circuit which introduces a pole to the transfer function with a frequency lower than cascode pole; feed-forward compensation is employed to reduce the effect of this pole on the frequency response. The input common mode range is limited slightly by 0.2-0.3V with respect to folded cascode which is insensible. HSPICE simulations using level 49 parameters (BSIM3v3) in a typical 0.35μm CMOS technology result in three times gain boosting and 60% enhancement in unity gain bandwidth compared to folded cascode, while the power consumption is increased by 10%.
- 社団法人電子情報通信学会の論文
- 2006-06-01
著者
-
Hadidi Khayrollah
Microelectronic Research Laboratory Urmia University
-
Hadidi Khayrollah
Urmia Univ. Urmia Irn
-
MOTTAGHI-KASHTIBAN Mahdi
Electrical Engineering Department, Urmia University
-
MOTTAGHI-KASHTIBAN Mahdi
Department of Electrical Engineering, Urmia University
-
HADIDI Khayrollah
Department of Electrical Engineering, Urmia University
-
KHOEI Abdollah
Department of Electrical Engineering, Urmia University
-
Khoei Abdollah
Urmia Univ. Urmia Irn
-
Mottaghi-kashtiban Mahdi
Electrical Engineering Department Urmia University
関連論文
- A Novel Open Loop Structure for Phase Shifting and Frequency Synthesizing
- A Current-Mode, First-Order Takagi-Sugeno-Kang Fuzzy Logic Controller, Supporting Rational-Powered Membership Functions(Analog Circuits and Related SoC Integration Technologies)
- Design of a New Folded Cascode Op-Amp Using Positive Feedback and Bulk Amplification(Analog Circuits and Related SoC Integration Technologies)
- Design of Analog Current-Mode Loser-Take-All Circuit(Analog Circuit and Device Technologies)
- Modified CMOS Op-Amp with Improved Gain and Bandwidth(Analog Circuit and Device Technologies)
- A Low-Power, Small-Size 10-Bit Successive-Approximation ADC(Analog Signal Processing)
- A Practical, Systematic, Simple Method to Evaluate Speed/Bandwidth Potential of CMOS Processes for Analog Design and Related Practical Considerations
- A Highly Linear and Large Bandwidth Fully Differential CMOS Line Driver Suitable for High-Speed Data Transmission Applications(Analog Circuit Techniques and Related Topics)
- A Novel Open-Loop High-Speed CMOS Sample-and-Hold
- Design of Voltage-Mode MAX-MIN Circuits with Low Area and Low Power Consumption
- High Efficiency On-Chip CMOS DC-DC Converters for Mixed Analog-Digital Low-Power ICs(Analog Circuit Techniques and Related Topics)
- A New Method for Offset Cancellation in High-Resolution High-Speed Comparators(Building Block, Analog Circuit and Device Technologies)
- A Novel and Very Fast 4-2 Compressor for High Speed Arithmetic Operations
- Ultra High Speed Modified Booth Encoding Architecture for High Speed Parallel Accumulations