A New Method for Offset Cancellation in High-Resolution High-Speed Comparators(Building Block, <Special Section>Analog Circuit and Device Technologies)

概要

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High-Speed High-Resolution Comparators are integral parts of very high-speed high-resolution Analog-to-Digital Converters (ADC). Parallel successive-approximation and flash ADCS can boost conversion rates while providing high resolution, provided that accurate and fast offset-cancelled comparators could be implemented. Moreover, accurate offset cancellation is needed in accurate gain stages of other types of high speed ADCs as well. This has never been easy and creates a bottle neck for high-speed high-resolution ADCs. The reason is that conventional offset cancellation methods [1], suffer either from inaccurate cancellation or from slow operation. Hence, either speed or accuracy is compromised. This is due to the trade off of gain (accuracy) for bandwidth (speed) in conventional methods. Here, we introduce a new offset cancellation method which satisfies the need for both high-speed and accurate offset cancellation simultaneously.
社団法人電子情報通信学会の論文
2005-06-01