Influence of Strontium Impurities on Silicon Substrates during Thermal Processing

概要

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The influence of strontium impurities on silicon substrates was evaluated in order to introduce high dielectric constant SrTiO_3 thin films into the LSI manufacturing process. Sr metal impurities were intentionally diffused into silicon during annealing at 950℃ in N_2 for 4 h. A 5-nm-thick SiO_2 layer was formed when inserting wafers in and taking them out of the furnace, and the Sr impurity concentration was maximum beneath the SiO_2/Si interface. Sr impurities cause an increase in positive charge in the SiO_2 layer. However, the recombination lifetime of minority carriers in Si is not degraded by Sr impurities, even for Sr levels up to 10^<14> atoms/cm^2. After annealing at 700℃ in O_2 for 2 h, no Sr was detected on the surface of a Si wafer facing a wafer covered with a SrTiO_3 thin film prepared by metal organic chemical vapor deposition. Therefore, it is believed that Sr can safely be introduced into the LSI manufacturing process.
社団法人応用物理学会の論文
1995-09-30