A Nano-Structure Memory with Silicon on Insulator Edge Channel and a Nano Dot
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概要
- 論文の詳細を見る
We fabricated nano structure memory with silicon on insulator (SOI) edge channel and a nano dot. The width of the edge channel was determined by the thickness of the recessed top-silicon layer of SOI wafer and the size of sidewall nano dot was determined by the reactive ion etching (RIE) etch and E-beam lithography. The memory has the threshold voltage shift of about 1 V for maximum programming voltage of 7 V and showed reasonable retention and endurance characteristics.
- 社団法人応用物理学会の論文
- 1998-12-30
著者
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Shin Hyungcheol
Department Of Electrical Engineering And Computer Science Korea Advanced Institute Of Science And Te
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Shin Hyungcheol
Department Of Electrical Engineering And Computer Science Kaist
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Hwang Taekeun
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology:hyundai Micr
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HAN Sangyeon
Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and T
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Han Sangyeon
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology
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Han Sangyeon
Department Of Electrical Engineering And Computer Science Korea Advanced Institute Of Science And Te
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PARK Geunsook
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology
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Park Geunsook
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology:(present Add
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Shin Hyungcheol
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology
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