Path-Classified Trace Cache for Improving Hit Ratio in Wide-Issue Processors
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概要
- 論文の詳細を見る
In this paper, an instruction-cache scheme called Multi-Path Tracing is proposed to enhance the trace cache. Paths are classified to improve the trace cache hit ratio by reducing the path conflict and basic blocks are joined to reduce the hardware cost needed to implement the trace cache. Simulation results for various SPEC integer benchmarks show that the proposed scheme increases the hit ratio by more than 25% and the effective fetch size by 10%.
- 社団法人電子情報通信学会の論文
- 1999-10-25
著者
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Park In-cheol
Department Of Eecs Kaist
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Kyung Chong-min
Department Of Eecs Kaist Taejon
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YANG Jin-Hyuk
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology
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Yang Jin-hyuk
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology
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