論理スレッド番号により管理されるキャッシュを持つマルチスレッドプロセッサの性能評価

概要

論文の詳細を見る
Currently, multi-threaded architectures such as chip multi-processor and SMT (Simultaneous Multi-threading), which exploit TLP in addition to ILP, are in a hot topic. In such architecture, however, simultaneously executed threads cause conflicts in cache entries among threads, thus it may degrade efficiency of cache. In this paper, we propose an LTN based replacement strategy that utilizes thread number: Logical Thread Number (LTN) managed by OS in order to control a thread to be replaced in cache entry. We have evaluated our proposed strategy by simulator MUTHASI. Since it is not necessary to add so much hardware resources for the LTN replacement strategy, it is expected that the LTN based replacement strategy brings high hit ratio without expansion of chip area.
一般社団法人情報処理学会の論文
2003-06-24