Ultra-thin Ge-on-Insulator (GOI) Metal S/D p-channel MOSFETs fabricated by low temperature MBE growth

スポンサーリンク

概要

• 論文の詳細を見る
• 2006-09-13

著者

• TAKAGI Shinichi

  Graduate School of Frontier Science, The Univ. of Tokyo

• Sugahara Satoshi

  Graduate School Of Frontier Science The Univ. Of Tokyo

• Uehara Takashi

  Graduate School Of Frontier Science The Univ. Of Tokyo

• MATSUBARA Hiroshi

  Graduate School of Frontier Science, The Univ. of Tokyo

• Takagi Shinichi

  Graduate School Of Frontier Science The Univ. Of Tokyo

• Matsubara Hiroshi

  Graduate School Of Frontier Science The Univ. Of Tokyo

関連論文

• Examination of the Universality of Hole Mobility in Strained-Si p-MOSFETs
• Comparative Study on Influence of Subband Structures on Electrical Characteristics of III-V Semiconductor, Ge and Si Channel n-MISFETs
• Fabrication of 3-5 on insulator structures on Si using microchannel epitaxy with a two-step growth technique
• Fabrication of III-V-O-I (III-V on Insulator) structures on Si using micro-channel epitaxy with a two-step growth technique
• Fabrication of SiO_2/Ge MIS structures by plasma oxidation of ultrathin Si films grown on Ge
• Ultra-thin Ge-on-Insulator (GOI) Metal S/D p-channel MOSFETs fabricated by low temperature MBE growth
• Energy relaxation of two-dimensional electrons in Si-MOSFETs : determination of deformational potential constant of conduction band of Si
• Evaluation of SiO_2/GeO_2/Ge MIS Interface Properties by Low Temperature Conductance Method
• Fabrication of III–V on Insulator Structures on Si Using Microchannel Epitaxy with a Two-Step Growth Technique
• Ultrathin Ge-on-Insulator Metal Source/Drain p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated By Low-Temperature Molecular-Beam Epitaxy
• Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata

もっと見る 閉じる

スポンサーリンク