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Semiconductor Leading Edge Technologies (Selete), Inc., Tsukuba, Ibaraki 305-8569, Japan | 論文
- Comprehensive Understanding of PBTI and NBTI reliability of High-k / Metal Gate Stacks with EOT Scaling to sub-1nm
- Mechanism of Threshold Voltage Reduction and Hole Mobility Enhancement in pMOSFETs Employing Sub-1nm EOT HfSiON by Use of Substrate Fluorine Ion Implantation
- Performance and Reliability Improvement by Optimized Nitrogen Content of TaSiNx Metal Gate in Metal/HfSiON nFETs
- Impact of Activation Annealing Temperature on the Performance, Negative Bias Temperature Instability, and Time-to-Dielectric Breakdown Lifetime of High-$k$/Metal Gate Stack p-Type Metal–Oxide–Semiconductor Field Effect Transistors
- Dual-Metal Gate Technology with Metal-Inserted Full Silicide Stack and Ni-Rich Full Silicide Gate Electrodes Using a Single Ni-Rich Full Silicide Phase for Scaled High-$k$ Complementary Metal–Oxide–Semiconductor Field-Effect Transistors
- Cathode Electron Injection Breakdown Model and Time Dependent Dielectric Breakdown Lifetime Prediction in High-$k$/Metal Gate Stack p-Type Metal–Oxide–Silicon Field Effect Transistors
- Origin of the Hole Current in n-type High-$k$/Metal Gate Stacks Field Effect Transistor in an Inversion State
- Comprehensive Analysis of Positive and Negative Bias Temperature Instabilities in High-$k$/Metal Gate Stack Metal–Oxide–Silicon Field Effect Transistors with Equivalent Oxide Thickness Scaling to Sub-1 nm
- Universal Correlation between Flatband Voltage and Electron Mobility in TiN/HfSiON Devices with MgO or La2O3 Incorporation and Stack Variation
- Performance and Reliability Improvement by Optimizing the Nitrogen Content of the TaSiNx Metal Gate in Metal/HfSiON n-Type Field-Effect Transistors
- Impact on Performance, Positive Bias Temperature Instability, and Time-Dependent Dielectric Dreakdown of n-Type Field Effect Transistors Incorporating Mg into HfSiON Gate Dielectrics
- Thermally Unstable Ruthenium Oxide Gate Electrodes in Metal/High-$k$ Gate Stacks