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Mitsubishi Electric Corp. Itami‐shi Jpn | 論文
- A Design of High-Speed 4-2 Compressor for Fast Multiplier (Special Issue on Ultra-High-Speed LSIs)
- A Reduced-Complexity Signal Detection Scheme Employing ZF and K-Best Algorithms for OFDM/SDM(Space Division Multiplexing)(Multi-carrier Signal Processing Techniques for Next Generation Mobile Communications-Part 1)
- STAGE-SPECIFIC EXPRESSION OF INTERLEUKIN-18 AND ITS RECEPTOR mRNA DURING SPERMATOGENESIS(Developmental Biology,Abstracts of papers presented at the 74^ Annual Meeting of the Zoological Society of Japan)
- Transmission of Y chromosomal microdeletions from father to son through intracytoplasmic sperm injection
- Screening for deletions in interval D16-22 of the Y chromosome in azoospermic and oligozoospermic Japanese men
- Analysis for microdeletions of Y chromosome in a single spermatozoon from a man with severe oligozoospermia
- Molecular analysis of familial androgen insensitivity syndrome due to replacement of glutamic acid 802 by lysine
- DNA Analysis of the Androgen Receptor Gene in Two Cases with Complete Androgen Insensitivity Syndrome
- Design Philosophy of a Data-Driven Processor: Q-p
- GaAs 10 Gb/s 64:1 Multiplexer/Demultiplexer Chip Sets (Special Issue on Ultra-High-Speed LSIs)
- Low Power Dissipation GaAs DCFL 2.5 Gbps 16-bit Multiplexer/Demultiplexer LSIs
- Preparation of New Nitrogen-Bridged Heterocycles. 56. Syntheses and Reactions of 1-[2,2-Bis(alkylthio)-1-(ethoxycarbonylacetyl)vinyl]pyridinium Salts
- A Low Quiescent Current CV/CC Parallel Operation HBT Power Amplifier for W-CDMA Terminals(Special Issue on Microwave and Millimeter Wave Technology)
- A Floating-Point Divider Using Redundant Binary Circuits and an Asynchronous Clock Scheme
- A 286 MHz 64-b Floating Point Multiplier with Enhanced CG Operation
- A 2.6-ns 64-b Fast and Small CMOS Adder (Special Issue on Ultra-High-Speed LSIs)
- Process Charactarization and Optimization for a Novel Oxide-Free Insulated Gate Structure for InP MISFETs Having Silicon Interface Control Layer (Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
- 60-GHz HEMT-Based MMIC One-Chip Receiver
- Power and Area Minimization by Reorganizing CMOS Complex-Gates (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems)
- Synergistic Power/Area Optimization with Transistor Sizing and Wire Length Minimization