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MIRAI-National Institute of Advanced Industrial Science and Technology (AIST) | 論文
- Deformation Induced Holes in Ge-Rich SiGe-on-Insulator and Ge-on-Insulator Substrates Fabricated by Ge Condensation Process
- High Mobility Fully-Depleted Germanium-on-Insulator pMOSFET with 32-nm-Thick Ge Channel Layer Formed by Ge-Condensation Technique
- Performance Enhancement under High-Temperature Operation and Physical Origin of Mobility Characteristics in Ge-rich strained SiGe-on-Insulator pMOSFETs
- Evaluation of Dislocation Density of SiGe-on-Insulator Substrates using Enhanced Secco Etching Method
- Advanced SOI MOSFET's with Strained-Si/SiGe Heterostructures(Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
- Novel Fabrication Technique for Relaxed SiGe-on-Insulator Substrates without Thick SiGe Buffer Structures
- Strained-Si-on-Insulator (Strained-SOI) MOSFETs-Concept, Structures and Device Characteristics
- Formation of SiGe on Insulator Structure and Approach to Obtain Highly Strained Si Layer for MOSFETs
- A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100nm Strained Silicon-on-Insulator MOSFETs
- A Novel Fabrication Technique of Ultra-Thin and Relaxed SiGe Buffer Layers with High Ge Content for Sub-100nm Strained Silicon-on-Insulator MOSFETs
- Critical-Dimension Measurement using Multi-Angle-Scanning Method in Atomic Force Microscope
- Side-Wall Measurement using Tilt-Scanning Method in Atomic Force Microscope
- Critical-Dimension Measurement using Multi-Angle-Scanning Method in Atomic Force Microscope
- Height Measurement Using High-Precision Atomic Force Microscope Scanner Combined with Laser Interferometers