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Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Compu | 論文
- Simulation of Gate-All-Around Tunnel Field-Effect Transistor with an n-Doped Layer
- Program/erase model of nitride-based NAND-type charge trap flash memories
- A new cone-type 1T DRAM cell (Electron devices)
- Independent Gate Twin-bit SONOS flash memory with split-gate effect (Silicon devices and materials)
- Investigation of field concentration effects in arch gate silicon-oxide-nitride-oxide-silicon flash memory
- Side-Gate Design Optimization of 50nm MOSFETs with Electrically Induced Source/Drain
- Side-gate Length Optimization for 50nm Induced Source/Drain MOSFETs
- Nanoscale SONOS Flash Memories(Session B6 Si-Devices II)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
- Nanoscale SONOS Flash Memories(Session B6 Si-Devices II)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
- Evaluation and resolution for nonideal characteristics of complementary metal-oxide-semiconductor devices fabricated on silicon-on-insulator
- Characteristic of Dual-Gate Single Electron Transistor (DG-SET) with extended channel using shallow doping and sidewall patterning for suppressing MOS current(Session 9B : Nano-Scale devices and Physics)
- A New Cone-Type 1T DRAM Cell(Session 2A : Memory 1)
- A New Cone-Type 1T DRAM Cell(Session 2A : Memory 1)
- Characteristic of Dual-Gate Single Electron Transistor (DG-SET) with extended channel using shallow doping and sidewall patterning for suppressing MOS current(Session 9B : Nano-Scale devices and Physics)
- Nanoscale Multi-Line Patterning Using Sidewall Structure
- Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology
- Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire
- Single Electron Memory with a Defined Poly-Si Dot Based on Conventional VLSI Technology
- Room Temperature Coulomb Oscillation of a Single Electron Switch with an Electrically Formed Quantum Dot and Its Modeling
- Independent Gate Twin-bit SONOS Flash Memory with Split-gate Effect(Session 8A : Memory 2)