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Central Research Laboratory, HITACHI, Ltd. | 論文
- New Technologies of a WSi Base Electrode and a Heavily-Doped Thin Base Layer for High-Performance InGaP/GaAs HBTs
- Precise CD-Controlled Gate Etching Using UHF-ECR Plasma
- Exchange-Coupled Magnetic Bilayer Media for Thermomagnetic Writing and Flux Detection
- New Recording Method Combining Thermo-Magnetic Writing and Flux Detection
- Design of a 2-ns Cycle Time 72-kb ECL-CMOS SRAM Macro
- A BiCMOS Circuit Using a Base-Boost Technique for Low-Voltage, Low-Power Application (Special Issue on Low-Power LSI Technologies)
- Redundancy Circuit for a Sub-nanosecond, Megabit ECL-CMOS SRAM
- A 0.65-ns, 72-kb ECL-CMOS RAM Macro for a 1-Mb SRAM(Special Issue on the 1994 VLSI Circuits Symposium)
- Reduction of Schottky Reverse Leakage Current Using GaAs Surface Cleaning with UVO_3 Treatment
- Silicon Planar Devices Using Nitrogen Ion Implantation
- Oxidation Characteristics of Nitrogen Implanted Silicon
- Substrate Temperature Measurement during Ion Implantation
- Lifetime Evaluation of Ion Implanted Layers by Pulsed MOS Capacitance
- A High-Endurance Read/Write Scheme for Half-V_cc Plate Nonvolatile DRAMs with Ferroelectric Capacitors(Special Issue on Nonvolatile Memories)
- A TiO2 Gate Insulator of a 1-nm Equivalent Oxide Thickness Deposited by Electron-Beam Evaporation
- Amorphous Channel SESO Memory with Good Logic Process Compatibility for Low-power High-density Embedded RAM
- Roles of Surface Functional Groups on TiN and SiN Substrates in Resist Pattern Deformations
- Investigation of Resist Pattern Deformation in Chemical Amplification Resists on SiN_x Substrates
- Characterization of One-Dimensional Conduction in an Ultra-Thin Poly-Si Wire
- Effective Electron Mobility Reduced by Remote Charge Scattering in High-K Gate Stacks : Short Note