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Advanced LSI Technology Laboratory, Research and Development Center, Toshiba corporation | 論文
- Influence of High Dielectric Constant in Gate Insulator on Remote Coulomb Scattering due to Gate Impurities in Si MOS Inversion Layer
- Physical Origins of Surface Carrier Density Dependences of Interface- and Remote-Coulomb Scattering Mobility in Si MOS Inversion Layer
- Unified Roughness Scattering Model Incorporating Scattering Component Induced by Thickness Fluctuation in SOI MOSFETs
- Quantitative Understanding of Mobility Degradation in High Effective Electric Field Region in MOSFETs with Ultra-thin Gate Oxides
- Quantitative Examination of Mobility Lowering Associated with Ultrathin Gate Oxides in Silicon Metal-Oxide-Semiconductor Inversion Layer
- Analytical Single-Electron Transistor(SET)Model for Design and Analysis of Realistic SET Circuits
- New Approach to Negative Differential Conductance with High Peak-to-Valley Ratio in Silicon
- Mobility Enhancement of SOI MOSFETs due to Subband Modulation in Ultrathin SOI Films
- Mobility Enhancement of SOI MOSFETs Due to Subband Modulation in Ultra-Thin SOI Films
- Observation of Oxide Thickness Dependent Interface Roughness in Si MOS Structure
- Non-Volatile Doubly Stacked Si Dot Memory with Si Nano-Crystalline Layer
- Coulomb and Phonon Scattering Processes in Metal-Oxide-Semiconductor Inversion Layers : Beyond Matthiessen's Rule
- Guidelines for the threshold voltage control of metal/HfSiON system(Session2: Silicon Devices I)
- Guidelines for the threshold voltage control of metal/HfSiON system(Session2: Silicon Devices I)
- Material Characterization of Metal-germanide Gate Electrodes Formed by FUGE (Fully Germanided) Process
- Germanium-induced Modulation of Work Function and Impurity Segregation Effect in Fully-Ni-germanosilicide (Ni(Si_Ge_x)) Gate
- Self-consistent Calculation of the Quasi-particle Energy Spectrum of Sodium using the Correlated Hartree-Fock Method
- Accurate Evaluation of Inversion-Layer Mobility and Experimental Extraction of Local Strain Effect in sub-μm Si MOSFETs
- Novel Si Quantum Memory Structure with Self-Aligned Stacked Nanocrystalline Dots
- Influence of Channel Depletion on the Carrier Charging Characteristics in Si Nanocrystal Floating Gate Memory