Zhu Min | Institute Of Microelectronics Tsinghua University
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概要
関連著者
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Zhu Min
Institute Of Microelectronics Tsinghua University
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Liu Leibo
Institute Of Microelectronics Tsinghua University
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Wei Shaojun
Institute Of Microelectronics Tsinghua University
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Shi Longxing
National ASIC Center, Southeast University
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Yang Jun
National Asic System Engineering Research Center Southeast University
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Cao Peng
National ASIC system and research engineering center, Southeast University
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Yin Shouyi
Institute Of Microelectronics Tsinghua University
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Yin Chongyong
Institute Of Microelectronics Tsinghua University
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Cao Peng
National Asic System Engineering Research Center Southeast University
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NGUYEN Hung
National ASIC system Engineering Research Center, Southeast University
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WANG Xue-Xiang
National ASIC system Engineering Research Center, Southeast University
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Shi Longxing
National Asic System Engineering Research Center Southeast University
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Cao Peng
National Asic System Engineering Technology Research Center Southeast University
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Geng Tongsheng
Institute Of Microelectronics Tsinghua University
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LIU Xinning
National ASIC system Engineering Research Center, Southeast University
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MEI Chen
National ASIC system Engineering Research Center, Southeast University
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Mei Chen
National Asic System Engineering Research Center Southeast University
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Liu Xinning
National Asic System Engineering Research Center Southeast University
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Xiao Jian
National Asic System Engineering Research Center Southeast University
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ZHANG Jinguo
High Technology Research and Development Center of the Ministry of Science and Technology
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ZHU Min
Institute of Microelectronics, Tsinghua University
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WEI Shaojun
Institute of Microelectronics, Tsinghua University
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YANG Jun
National ASIC system Engineering Research Center, Southeast University
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LIU Bo
National ASIC system Engineering Research Center, Southeast University
著作論文
- A Cycle-Accurate Simulator for a Reconfigurable Multi-Media System
- Parallelization of Computing-Intensive Tasks of the H.264 High Profile Decoding Algorithm on a Reconfigurable Multimedia System
- Date Flow Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications
- Configuration Context Reduction for Coarse-Grained Reconfigurable Architecture
- Fast AdaBoost-Based Face Detection System on a Dynamically Coarse Grain Reconfigurable Architecture
- Reconfiguration Process Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications
- Hardware Software Co-design of H.264 Baseline Encoder on Coarse-Grained Dynamically Reconfigurable Computing System-on-Chip
- Hardware Software Co-design of H.264 Baseline Encoder on Coarse-Grained Dynamically Reconfigurable Computing System-on-Chip