Cai Yici | Department Of Computer Science And Technology Tsinghua University

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著作論文

A Novel Timing-Driven Global Routing Algorithm Considering Coupling Effects for High Performance Circuit Design(Place and Routing)(VLSI Design and CAD Algorithms)
A Novel Timing-Driven Global Routing Algorithm Considering Coupling Effects for High Performance Circuit Design
Early Stage Power Supply Planning : A Heuristic Method for Codesign of Power/Ground Network and Floorplan
Logic and Layout Aware Level Converter Optimization for Multiple Supply Voltage
Stochastic Interconnect Tree Construction Algorithm with Accurate Delay and Power Consideration(VLSI Design Technology and CAD)
Navigating Register Placement for Low Power Clock Network Design(Floorplan and Placement, VLSI Design and CAD Algorithms)
A Fast Delay Computation for the Hybrid Structured Clock Network(VLSI Design Technology and CAD)

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