NAGANO Takahiro | Semiconductor and Integrated Circuits Division, Hitachi, Ltd.
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概要
関連著者
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NAGANO Takahiro
Semiconductor and Integrated Circuits Division, Hitachi, Ltd.
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Nishida Takashi
Central Research Laboratory Hitachi Ltd.
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YAMANAKA Toshiaki
Central Research Laboratory, Hitachi, Ltd.
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Nagano Takahiro
Semiconductor And Integrated Circuits Division Hitachi Ltd.
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Aoki Masaaki
Central Research Laboratory Hitachi Ltd.
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HASHIMOTO Takashi
Semiconductor and Integrated Circuits Division, Hitachi, Ltd.
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Yamanaka Toshio
The Graduate School Of Advanced Sciences Of Matter Hiroshima University:texas Instruments Japan Limi
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Yamanaka T
Renesas Device Design
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Minami Masataka
Semiconductor And Integrated Circuits Division Hitachi Ltd.
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Yamanaka Toshiaki
Central Research Laboratory Hitachi Ltd.
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Kure T
Hitachi Ltd. Tokyo Jpn
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Kure Tokuo
Hitachi Central Research Laboratory
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MINAMI Masataka
Semiconductor and Integrated Circuits Division, Hitachi, Ltd.
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OHKI Nagatoshi
Hitachi ULSI Engineering Corp.
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ISHIDA Hiroshi
Hitachi ULSI Engineering Corp.
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SHIMIZU Akihiro
Hitachi ULSI Engineering Corp.
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ISHIBASHI Koichiro
Central Research Laboratory, Hitachi, Ltd.
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SATOH Akira
Hitachi ULSI Engineering Corp.
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NISHIDA Takashi
Semiconductor and Integrated Circuits Division, Hitachi, Ltd.
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Kure Tokuo
Hitachi Ulsi Engineering Corp.
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Minami M
Keio Univ. Fujisawa‐shi Jpn
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Nagano T
Hitachi Ulsi Systems Co. Ltd. Kodaira‐shi Jpn
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Nagano Tomohiro
Department Of Physics Faculty Of Sciense And Technology Science University Of Tokyo
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Shimizu A
Kochi Univ. Technol. Kochi‐ken Jpn
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Shimizu A
Hitachi Ulsi Engineering Corp.
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Shimizu Akihiro
東京工業高等専門学校
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SHIMIZU Akihiro
Kochi University of Technology
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Tachibana Suguru
Central Research Laboratory, Hitachi Ltd.
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Higuchi Hisayuki
Central Research Laboratory Hitachi Ltd.
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Ishibashi K
Riken Wako‐shi Jpn
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Ishibashi Koichiro
Central Research Laboratory Hitachi Ltd.
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Tachibana Suguru
Central Research Laboratory Hitachi Ltd.
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Hashimoto Takashi
Central Research Laboratory Hitachi Ltd.
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AOKI Masaaki
Central Research Laboratory, Hitachi, Ltd.
著作論文
- A 6.93-μm^2 Full CMOS SRAM Cell Technology for 1.8-V High-Performance Cache Memory
- Large 1/f Noise in Polysilicon TFT Loads and its Effects on the Stability of SRAM Cells
- Large 1/f Noise in Polysilicon TFT Loads and Its Effects on the Stability of SRAM Cells
- A 5-mW, 10-ns Cycle TLB Using a High-Performance CAM with Low-Power Match-Detection Circuits (Special Issue on ULSI Memory Technology)