Oh J‐k | Seoul National Univ. Seoul Kor

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概要

• Oh Jae-Keunの詳細を見る
• 同名の論文著者
• Seoul National Univ. Seoul Korの論文著者

関連著者

• Han M‐k

  The Author Is With The School Of Electrical Engineering Seoul National University

• Ha Min-woo

  School Of Electrical Eng. & Computer Science #50 Seoul National University

• Choi Y‐i

  School Of Electrical Eng. & Computer Science #50 Seoul National University

• Han M‐k

  Seoul Nat'l Univ. Seoul Kor

• Han Min-Koo

  School of Electrical Engineering, Seoul National University

• Oh J‐k

  Seoul National Univ. Seoul Kor

• Han Min-koo

  School Of Electrical Engineering And Computer Science #50 Seoul National University

• OH Jae-Keun

  School of Electrical Engineering #50, Seoul National University

• Oh Jae-keun

  School Of Electrical Eng. #50 Seoul National University

• Choi Young-hwan

  School Of Electrical Eng. Seoul Nat'l Univ.

• Han Min-koo

  School Of Electrical Eng. & Computer Science #50 Seoul National University

• Han Min-Koo

  School of Electrical al Engineering and Computer Science #50, Seoul National University, Seoul 151-742, Korea

• SEO Kwang-Seok

  School of Electrical Engineering, Seoul National University

• CHOI Yearn-Ik

  College of Electronics Eng., Ajou University

• Choi Yearn-ik

  School Of Electrical Eng. & Computer Science #50 Seoul National University

• Seo K‐s

  Seoul Nat'l Univ. Eecs/ee

• Seo Kwang-seok

  School Of Electrical Engineering And Computer Science Seoul National University

• Seo Kwang-seok

  Seoul Nat'l Univ. Eecs/ee

• Seo Kwang-Seok

  School of Electrical Engineering #50, Seoul National University, Shinlim-dong, Gwanak-gu, Seoul 151-742, Korea

• JEON Byung-Chul

  School of Electrical Eng. & Computer Science #50, Seoul National University

• CHOI Yearn-Ik

  School of Electrical Eng. & Computer Science #50, Seoul National University

• Jeon Byung-chul

  School Of Electrical Eng. & Computer Science #50 Seoul National University

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著作論文

• A New Conductivity Modulated LDMOSFET Employing Buried P Region and P^+ Drain
• A New Junction Termination in Power Semiconductor Devices employing Trench
• A New Junction Termination in Power Semiconductor Devices employing Trench

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